1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun/ { 4*4882a593Smuzhiyun compatible = "opencores,or1ksim"; 5*4882a593Smuzhiyun #address-cells = <1>; 6*4882a593Smuzhiyun #size-cells = <1>; 7*4882a593Smuzhiyun interrupt-parent = <&pic>; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun aliases { 10*4882a593Smuzhiyun uart0 = &serial0; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun chosen { 14*4882a593Smuzhiyun bootargs = "earlycon"; 15*4882a593Smuzhiyun stdout-path = "uart0:115200"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@0 { 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0x00000000 0x02000000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun cpus { 24*4882a593Smuzhiyun #address-cells = <1>; 25*4882a593Smuzhiyun #size-cells = <0>; 26*4882a593Smuzhiyun cpu@0 { 27*4882a593Smuzhiyun compatible = "opencores,or1200-rtlsvn481"; 28*4882a593Smuzhiyun reg = <0>; 29*4882a593Smuzhiyun clock-frequency = <20000000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* 34*4882a593Smuzhiyun * OR1K PIC is built into CPU and accessed via special purpose 35*4882a593Smuzhiyun * registers. It is not addressable and, hence, has no 'reg' 36*4882a593Smuzhiyun * property. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun pic: pic { 39*4882a593Smuzhiyun compatible = "opencores,or1k-pic"; 40*4882a593Smuzhiyun #interrupt-cells = <1>; 41*4882a593Smuzhiyun interrupt-controller; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun serial0: serial@90000000 { 45*4882a593Smuzhiyun compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; 46*4882a593Smuzhiyun reg = <0x90000000 0x100>; 47*4882a593Smuzhiyun interrupts = <2>; 48*4882a593Smuzhiyun clock-frequency = <20000000>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun enet0: ethoc@92000000 { 52*4882a593Smuzhiyun compatible = "opencores,ethoc"; 53*4882a593Smuzhiyun reg = <0x92000000 0x800>; 54*4882a593Smuzhiyun interrupts = <4>; 55*4882a593Smuzhiyun big-endian; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun}; 58