1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# For a description of the syntax of this configuration file, 4*4882a593Smuzhiyun# see Documentation/kbuild/kconfig-language.rst. 5*4882a593Smuzhiyun# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunconfig OPENRISC 8*4882a593Smuzhiyun def_bool y 9*4882a593Smuzhiyun select ARCH_32BIT_OFF_T 10*4882a593Smuzhiyun select ARCH_HAS_DMA_SET_UNCACHED 11*4882a593Smuzhiyun select ARCH_HAS_DMA_CLEAR_UNCACHED 12*4882a593Smuzhiyun select ARCH_HAS_SYNC_DMA_FOR_DEVICE 13*4882a593Smuzhiyun select OF 14*4882a593Smuzhiyun select OF_EARLY_FLATTREE 15*4882a593Smuzhiyun select IRQ_DOMAIN 16*4882a593Smuzhiyun select HANDLE_DOMAIN_IRQ 17*4882a593Smuzhiyun select GPIOLIB 18*4882a593Smuzhiyun select HAVE_ARCH_TRACEHOOK 19*4882a593Smuzhiyun select SPARSE_IRQ 20*4882a593Smuzhiyun select GENERIC_IRQ_CHIP 21*4882a593Smuzhiyun select GENERIC_IRQ_PROBE 22*4882a593Smuzhiyun select GENERIC_IRQ_SHOW 23*4882a593Smuzhiyun select GENERIC_IOMAP 24*4882a593Smuzhiyun select GENERIC_CPU_DEVICES 25*4882a593Smuzhiyun select HAVE_UID16 26*4882a593Smuzhiyun select GENERIC_ATOMIC64 27*4882a593Smuzhiyun select GENERIC_CLOCKEVENTS 28*4882a593Smuzhiyun select GENERIC_CLOCKEVENTS_BROADCAST 29*4882a593Smuzhiyun select GENERIC_STRNCPY_FROM_USER 30*4882a593Smuzhiyun select GENERIC_STRNLEN_USER 31*4882a593Smuzhiyun select GENERIC_SMP_IDLE_THREAD 32*4882a593Smuzhiyun select MODULES_USE_ELF_RELA 33*4882a593Smuzhiyun select HAVE_DEBUG_STACKOVERFLOW 34*4882a593Smuzhiyun select OR1K_PIC 35*4882a593Smuzhiyun select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 36*4882a593Smuzhiyun select ARCH_USE_QUEUED_SPINLOCKS 37*4882a593Smuzhiyun select ARCH_USE_QUEUED_RWLOCKS 38*4882a593Smuzhiyun select OMPIC if SMP 39*4882a593Smuzhiyun select ARCH_WANT_FRAME_POINTERS 40*4882a593Smuzhiyun select GENERIC_IRQ_MULTI_HANDLER 41*4882a593Smuzhiyun select MMU_GATHER_NO_RANGE if MMU 42*4882a593Smuzhiyun select SET_FS 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunconfig CPU_BIG_ENDIAN 45*4882a593Smuzhiyun def_bool y 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunconfig MMU 48*4882a593Smuzhiyun def_bool y 49*4882a593Smuzhiyun 50*4882a593Smuzhiyunconfig GENERIC_HWEIGHT 51*4882a593Smuzhiyun def_bool y 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunconfig NO_IOPORT_MAP 54*4882a593Smuzhiyun def_bool y 55*4882a593Smuzhiyun 56*4882a593Smuzhiyunconfig TRACE_IRQFLAGS_SUPPORT 57*4882a593Smuzhiyun def_bool y 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun# For now, use generic checksum functions 60*4882a593Smuzhiyun#These can be reimplemented in assembly later if so inclined 61*4882a593Smuzhiyunconfig GENERIC_CSUM 62*4882a593Smuzhiyun def_bool y 63*4882a593Smuzhiyun 64*4882a593Smuzhiyunconfig STACKTRACE_SUPPORT 65*4882a593Smuzhiyun def_bool y 66*4882a593Smuzhiyun 67*4882a593Smuzhiyunconfig LOCKDEP_SUPPORT 68*4882a593Smuzhiyun def_bool y 69*4882a593Smuzhiyun 70*4882a593Smuzhiyunmenu "Processor type and features" 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunchoice 73*4882a593Smuzhiyun prompt "Subarchitecture" 74*4882a593Smuzhiyun default OR1K_1200 75*4882a593Smuzhiyun 76*4882a593Smuzhiyunconfig OR1K_1200 77*4882a593Smuzhiyun bool "OR1200" 78*4882a593Smuzhiyun help 79*4882a593Smuzhiyun Generic OpenRISC 1200 architecture 80*4882a593Smuzhiyun 81*4882a593Smuzhiyunendchoice 82*4882a593Smuzhiyun 83*4882a593Smuzhiyunconfig DCACHE_WRITETHROUGH 84*4882a593Smuzhiyun bool "Have write through data caches" 85*4882a593Smuzhiyun default n 86*4882a593Smuzhiyun help 87*4882a593Smuzhiyun Select this if your implementation features write through data caches. 88*4882a593Smuzhiyun Selecting 'N' here will allow the kernel to force flushing of data 89*4882a593Smuzhiyun caches at relevant times. Most OpenRISC implementations support write- 90*4882a593Smuzhiyun through data caches. 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun If unsure say N here 93*4882a593Smuzhiyun 94*4882a593Smuzhiyunconfig OPENRISC_BUILTIN_DTB 95*4882a593Smuzhiyun string "Builtin DTB" 96*4882a593Smuzhiyun default "" 97*4882a593Smuzhiyun 98*4882a593Smuzhiyunmenu "Class II Instructions" 99*4882a593Smuzhiyun 100*4882a593Smuzhiyunconfig OPENRISC_HAVE_INST_FF1 101*4882a593Smuzhiyun bool "Have instruction l.ff1" 102*4882a593Smuzhiyun default y 103*4882a593Smuzhiyun help 104*4882a593Smuzhiyun Select this if your implementation has the Class II instruction l.ff1 105*4882a593Smuzhiyun 106*4882a593Smuzhiyunconfig OPENRISC_HAVE_INST_FL1 107*4882a593Smuzhiyun bool "Have instruction l.fl1" 108*4882a593Smuzhiyun default y 109*4882a593Smuzhiyun help 110*4882a593Smuzhiyun Select this if your implementation has the Class II instruction l.fl1 111*4882a593Smuzhiyun 112*4882a593Smuzhiyunconfig OPENRISC_HAVE_INST_MUL 113*4882a593Smuzhiyun bool "Have instruction l.mul for hardware multiply" 114*4882a593Smuzhiyun default y 115*4882a593Smuzhiyun help 116*4882a593Smuzhiyun Select this if your implementation has a hardware multiply instruction 117*4882a593Smuzhiyun 118*4882a593Smuzhiyunconfig OPENRISC_HAVE_INST_DIV 119*4882a593Smuzhiyun bool "Have instruction l.div for hardware divide" 120*4882a593Smuzhiyun default y 121*4882a593Smuzhiyun help 122*4882a593Smuzhiyun Select this if your implementation has a hardware divide instruction 123*4882a593Smuzhiyunendmenu 124*4882a593Smuzhiyun 125*4882a593Smuzhiyunconfig NR_CPUS 126*4882a593Smuzhiyun int "Maximum number of CPUs (2-32)" 127*4882a593Smuzhiyun range 2 32 128*4882a593Smuzhiyun depends on SMP 129*4882a593Smuzhiyun default "2" 130*4882a593Smuzhiyun 131*4882a593Smuzhiyunconfig SMP 132*4882a593Smuzhiyun bool "Symmetric Multi-Processing support" 133*4882a593Smuzhiyun help 134*4882a593Smuzhiyun This enables support for systems with more than one CPU. If you have 135*4882a593Smuzhiyun a system with only one CPU, say N. If you have a system with more 136*4882a593Smuzhiyun than one CPU, say Y. 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun If you don't know what to do here, say N. 139*4882a593Smuzhiyun 140*4882a593Smuzhiyunsource "kernel/Kconfig.hz" 141*4882a593Smuzhiyun 142*4882a593Smuzhiyunconfig OPENRISC_NO_SPR_SR_DSX 143*4882a593Smuzhiyun bool "use SPR_SR_DSX software emulation" if OR1K_1200 144*4882a593Smuzhiyun default y 145*4882a593Smuzhiyun help 146*4882a593Smuzhiyun SPR_SR_DSX bit is status register bit indicating whether 147*4882a593Smuzhiyun the last exception has happened in delay slot. 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun OpenRISC architecture makes it optional to have it implemented 150*4882a593Smuzhiyun in hardware and the OR1200 does not have it. 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun Say N here if you know that your OpenRISC processor has 153*4882a593Smuzhiyun SPR_SR_DSX bit implemented. Say Y if you are unsure. 154*4882a593Smuzhiyun 155*4882a593Smuzhiyunconfig OPENRISC_HAVE_SHADOW_GPRS 156*4882a593Smuzhiyun bool "Support for shadow gpr files" if !SMP 157*4882a593Smuzhiyun default y if SMP 158*4882a593Smuzhiyun help 159*4882a593Smuzhiyun Say Y here if your OpenRISC processor features shadowed 160*4882a593Smuzhiyun register files. They will in such case be used as a 161*4882a593Smuzhiyun scratch reg storage on exception entry. 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun On SMP systems, this feature is mandatory. 164*4882a593Smuzhiyun On a unicore system it's safe to say N here if you are unsure. 165*4882a593Smuzhiyun 166*4882a593Smuzhiyunconfig CMDLINE 167*4882a593Smuzhiyun string "Default kernel command string" 168*4882a593Smuzhiyun default "" 169*4882a593Smuzhiyun help 170*4882a593Smuzhiyun On some architectures there is currently no way for the boot loader 171*4882a593Smuzhiyun to pass arguments to the kernel. For these architectures, you should 172*4882a593Smuzhiyun supply some command-line options at build time by entering them 173*4882a593Smuzhiyun here. 174*4882a593Smuzhiyun 175*4882a593Smuzhiyunmenu "Debugging options" 176*4882a593Smuzhiyun 177*4882a593Smuzhiyunconfig JUMP_UPON_UNHANDLED_EXCEPTION 178*4882a593Smuzhiyun bool "Try to die gracefully" 179*4882a593Smuzhiyun default y 180*4882a593Smuzhiyun help 181*4882a593Smuzhiyun Now this puts kernel into infinite loop after first oops. Till 182*4882a593Smuzhiyun your kernel crashes this doesn't have any influence. 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun Say Y if you are unsure. 185*4882a593Smuzhiyun 186*4882a593Smuzhiyunconfig OPENRISC_ESR_EXCEPTION_BUG_CHECK 187*4882a593Smuzhiyun bool "Check for possible ESR exception bug" 188*4882a593Smuzhiyun default n 189*4882a593Smuzhiyun help 190*4882a593Smuzhiyun This option enables some checks that might expose some problems 191*4882a593Smuzhiyun in kernel. 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun Say N if you are unsure. 194*4882a593Smuzhiyun 195*4882a593Smuzhiyunendmenu 196*4882a593Smuzhiyun 197*4882a593Smuzhiyunendmenu 198