1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Nios2 TLB handling
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2009, Wind River Systems Inc
5*4882a593Smuzhiyun * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
8*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
9*4882a593Smuzhiyun * for more details.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/sched.h>
14*4882a593Smuzhiyun #include <linux/mm.h>
15*4882a593Smuzhiyun #include <linux/pagemap.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/tlb.h>
18*4882a593Smuzhiyun #include <asm/mmu_context.h>
19*4882a593Smuzhiyun #include <asm/cpuinfo.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define TLB_INDEX_MASK \
22*4882a593Smuzhiyun ((((1UL << (cpuinfo.tlb_ptr_sz - cpuinfo.tlb_num_ways_log2))) - 1) \
23*4882a593Smuzhiyun << PAGE_SHIFT)
24*4882a593Smuzhiyun
get_misc_and_pid(unsigned long * misc,unsigned long * pid)25*4882a593Smuzhiyun static void get_misc_and_pid(unsigned long *misc, unsigned long *pid)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun *misc = RDCTL(CTL_TLBMISC);
28*4882a593Smuzhiyun *misc &= (TLBMISC_PID | TLBMISC_WAY);
29*4882a593Smuzhiyun *pid = *misc & TLBMISC_PID;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun * This provides a PTEADDR value for addr that will cause a TLB miss
34*4882a593Smuzhiyun * (fast TLB miss). TLB invalidation replaces entries with this value.
35*4882a593Smuzhiyun */
pteaddr_invalid(unsigned long addr)36*4882a593Smuzhiyun static unsigned long pteaddr_invalid(unsigned long addr)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return ((addr | 0xC0000000UL) >> PAGE_SHIFT) << 2;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun * This one is only used for pages with the global bit set so we don't care
43*4882a593Smuzhiyun * much about the ASID.
44*4882a593Smuzhiyun */
replace_tlb_one_pid(unsigned long addr,unsigned long mmu_pid,unsigned long tlbacc)45*4882a593Smuzhiyun static void replace_tlb_one_pid(unsigned long addr, unsigned long mmu_pid, unsigned long tlbacc)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun unsigned int way;
48*4882a593Smuzhiyun unsigned long org_misc, pid_misc;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* remember pid/way until we return. */
51*4882a593Smuzhiyun get_misc_and_pid(&org_misc, &pid_misc);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, (addr >> PAGE_SHIFT) << 2);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun for (way = 0; way < cpuinfo.tlb_num_ways; way++) {
56*4882a593Smuzhiyun unsigned long pteaddr;
57*4882a593Smuzhiyun unsigned long tlbmisc;
58*4882a593Smuzhiyun unsigned long pid;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT);
61*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun pteaddr = RDCTL(CTL_PTEADDR);
64*4882a593Smuzhiyun if (((pteaddr >> 2) & 0xfffff) != (addr >> PAGE_SHIFT))
65*4882a593Smuzhiyun continue;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun tlbmisc = RDCTL(CTL_TLBMISC);
68*4882a593Smuzhiyun pid = (tlbmisc >> TLBMISC_PID_SHIFT) & TLBMISC_PID_MASK;
69*4882a593Smuzhiyun if (pid != mmu_pid)
70*4882a593Smuzhiyun continue;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun tlbmisc = (mmu_pid << TLBMISC_PID_SHIFT) | TLBMISC_WE |
73*4882a593Smuzhiyun (way << TLBMISC_WAY_SHIFT);
74*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
75*4882a593Smuzhiyun if (tlbacc == 0)
76*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));
77*4882a593Smuzhiyun WRCTL(CTL_TLBACC, tlbacc);
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun * There should be only a single entry that maps a
80*4882a593Smuzhiyun * particular {address,pid} so break after a match.
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun break;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, org_misc);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
flush_tlb_one_pid(unsigned long addr,unsigned long mmu_pid)88*4882a593Smuzhiyun static void flush_tlb_one_pid(unsigned long addr, unsigned long mmu_pid)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun pr_debug("Flush tlb-entry for vaddr=%#lx\n", addr);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun replace_tlb_one_pid(addr, mmu_pid, 0);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
reload_tlb_one_pid(unsigned long addr,unsigned long mmu_pid,pte_t pte)95*4882a593Smuzhiyun static void reload_tlb_one_pid(unsigned long addr, unsigned long mmu_pid, pte_t pte)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun pr_debug("Reload tlb-entry for vaddr=%#lx\n", addr);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun replace_tlb_one_pid(addr, mmu_pid, pte_val(pte));
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)102*4882a593Smuzhiyun void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
103*4882a593Smuzhiyun unsigned long end)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun unsigned long mmu_pid = get_pid_from_context(&vma->vm_mm->context);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun while (start < end) {
108*4882a593Smuzhiyun flush_tlb_one_pid(start, mmu_pid);
109*4882a593Smuzhiyun start += PAGE_SIZE;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
reload_tlb_page(struct vm_area_struct * vma,unsigned long addr,pte_t pte)113*4882a593Smuzhiyun void reload_tlb_page(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun unsigned long mmu_pid = get_pid_from_context(&vma->vm_mm->context);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun reload_tlb_one_pid(addr, mmu_pid, pte);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun * This one is only used for pages with the global bit set so we don't care
122*4882a593Smuzhiyun * much about the ASID.
123*4882a593Smuzhiyun */
flush_tlb_one(unsigned long addr)124*4882a593Smuzhiyun static void flush_tlb_one(unsigned long addr)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun unsigned int way;
127*4882a593Smuzhiyun unsigned long org_misc, pid_misc;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun pr_debug("Flush tlb-entry for vaddr=%#lx\n", addr);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* remember pid/way until we return. */
132*4882a593Smuzhiyun get_misc_and_pid(&org_misc, &pid_misc);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, (addr >> PAGE_SHIFT) << 2);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun for (way = 0; way < cpuinfo.tlb_num_ways; way++) {
137*4882a593Smuzhiyun unsigned long pteaddr;
138*4882a593Smuzhiyun unsigned long tlbmisc;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT);
141*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun pteaddr = RDCTL(CTL_PTEADDR);
144*4882a593Smuzhiyun if (((pteaddr >> 2) & 0xfffff) != (addr >> PAGE_SHIFT))
145*4882a593Smuzhiyun continue;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun pr_debug("Flush entry by writing way=%dl pid=%ld\n",
148*4882a593Smuzhiyun way, (pid_misc >> TLBMISC_PID_SHIFT));
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun tlbmisc = TLBMISC_WE | (way << TLBMISC_WAY_SHIFT);
151*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
152*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));
153*4882a593Smuzhiyun WRCTL(CTL_TLBACC, 0);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, org_misc);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
flush_tlb_kernel_range(unsigned long start,unsigned long end)159*4882a593Smuzhiyun void flush_tlb_kernel_range(unsigned long start, unsigned long end)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun while (start < end) {
162*4882a593Smuzhiyun flush_tlb_one(start);
163*4882a593Smuzhiyun start += PAGE_SIZE;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
dump_tlb_line(unsigned long line)167*4882a593Smuzhiyun void dump_tlb_line(unsigned long line)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun unsigned int way;
170*4882a593Smuzhiyun unsigned long org_misc;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun pr_debug("dump tlb-entries for line=%#lx (addr %08lx)\n", line,
173*4882a593Smuzhiyun line << (PAGE_SHIFT + cpuinfo.tlb_num_ways_log2));
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /* remember pid/way until we return */
176*4882a593Smuzhiyun org_misc = (RDCTL(CTL_TLBMISC) & (TLBMISC_PID | TLBMISC_WAY));
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, line << 2);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun for (way = 0; way < cpuinfo.tlb_num_ways; way++) {
181*4882a593Smuzhiyun unsigned long pteaddr;
182*4882a593Smuzhiyun unsigned long tlbmisc;
183*4882a593Smuzhiyun unsigned long tlbacc;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, TLBMISC_RD | (way << TLBMISC_WAY_SHIFT));
186*4882a593Smuzhiyun pteaddr = RDCTL(CTL_PTEADDR);
187*4882a593Smuzhiyun tlbmisc = RDCTL(CTL_TLBMISC);
188*4882a593Smuzhiyun tlbacc = RDCTL(CTL_TLBACC);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if ((tlbacc << PAGE_SHIFT) != 0) {
191*4882a593Smuzhiyun pr_debug("-- way:%02x vpn:0x%08lx phys:0x%08lx pid:0x%02lx flags:%c%c%c%c%c\n",
192*4882a593Smuzhiyun way,
193*4882a593Smuzhiyun (pteaddr << (PAGE_SHIFT-2)),
194*4882a593Smuzhiyun (tlbacc << PAGE_SHIFT),
195*4882a593Smuzhiyun ((tlbmisc >> TLBMISC_PID_SHIFT) &
196*4882a593Smuzhiyun TLBMISC_PID_MASK),
197*4882a593Smuzhiyun (tlbacc & _PAGE_READ ? 'r' : '-'),
198*4882a593Smuzhiyun (tlbacc & _PAGE_WRITE ? 'w' : '-'),
199*4882a593Smuzhiyun (tlbacc & _PAGE_EXEC ? 'x' : '-'),
200*4882a593Smuzhiyun (tlbacc & _PAGE_GLOBAL ? 'g' : '-'),
201*4882a593Smuzhiyun (tlbacc & _PAGE_CACHED ? 'c' : '-'));
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, org_misc);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
dump_tlb(void)208*4882a593Smuzhiyun void dump_tlb(void)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun unsigned int i;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun for (i = 0; i < cpuinfo.tlb_num_lines; i++)
213*4882a593Smuzhiyun dump_tlb_line(i);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
flush_tlb_pid(unsigned long mmu_pid)216*4882a593Smuzhiyun void flush_tlb_pid(unsigned long mmu_pid)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun unsigned long addr = 0;
219*4882a593Smuzhiyun unsigned int line;
220*4882a593Smuzhiyun unsigned int way;
221*4882a593Smuzhiyun unsigned long org_misc, pid_misc;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* remember pid/way until we return */
224*4882a593Smuzhiyun get_misc_and_pid(&org_misc, &pid_misc);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun for (line = 0; line < cpuinfo.tlb_num_lines; line++) {
227*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun for (way = 0; way < cpuinfo.tlb_num_ways; way++) {
230*4882a593Smuzhiyun unsigned long tlbmisc;
231*4882a593Smuzhiyun unsigned long pid;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun tlbmisc = TLBMISC_RD | (way << TLBMISC_WAY_SHIFT);
234*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
235*4882a593Smuzhiyun tlbmisc = RDCTL(CTL_TLBMISC);
236*4882a593Smuzhiyun pid = (tlbmisc >> TLBMISC_PID_SHIFT) & TLBMISC_PID_MASK;
237*4882a593Smuzhiyun if (pid != mmu_pid)
238*4882a593Smuzhiyun continue;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun tlbmisc = TLBMISC_WE | (way << TLBMISC_WAY_SHIFT);
241*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
242*4882a593Smuzhiyun WRCTL(CTL_TLBACC, 0);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun addr += PAGE_SIZE;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, org_misc);
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * All entries common to a mm share an asid. To effectively flush these
253*4882a593Smuzhiyun * entries, we just bump the asid.
254*4882a593Smuzhiyun */
flush_tlb_mm(struct mm_struct * mm)255*4882a593Smuzhiyun void flush_tlb_mm(struct mm_struct *mm)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun if (current->mm == mm) {
258*4882a593Smuzhiyun unsigned long mmu_pid = get_pid_from_context(&mm->context);
259*4882a593Smuzhiyun flush_tlb_pid(mmu_pid);
260*4882a593Smuzhiyun } else {
261*4882a593Smuzhiyun memset(&mm->context, 0, sizeof(mm_context_t));
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
flush_tlb_all(void)265*4882a593Smuzhiyun void flush_tlb_all(void)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun unsigned long addr = 0;
268*4882a593Smuzhiyun unsigned int line;
269*4882a593Smuzhiyun unsigned int way;
270*4882a593Smuzhiyun unsigned long org_misc, pid_misc;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* remember pid/way until we return */
273*4882a593Smuzhiyun get_misc_and_pid(&org_misc, &pid_misc);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /* Start at way 0, way is auto-incremented after each TLBACC write */
276*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, TLBMISC_WE);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* Map each TLB entry to physcal address 0 with no-access and a
279*4882a593Smuzhiyun bad ptbase */
280*4882a593Smuzhiyun for (line = 0; line < cpuinfo.tlb_num_lines; line++) {
281*4882a593Smuzhiyun WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));
282*4882a593Smuzhiyun for (way = 0; way < cpuinfo.tlb_num_ways; way++)
283*4882a593Smuzhiyun WRCTL(CTL_TLBACC, 0);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun addr += PAGE_SIZE;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun /* restore pid/way */
289*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, org_misc);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
set_mmu_pid(unsigned long pid)292*4882a593Smuzhiyun void set_mmu_pid(unsigned long pid)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun unsigned long tlbmisc;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun tlbmisc = RDCTL(CTL_TLBMISC);
297*4882a593Smuzhiyun tlbmisc = (tlbmisc & TLBMISC_WAY);
298*4882a593Smuzhiyun tlbmisc |= (pid & TLBMISC_PID_MASK) << TLBMISC_PID_SHIFT;
299*4882a593Smuzhiyun WRCTL(CTL_TLBMISC, tlbmisc);
300*4882a593Smuzhiyun }
301