1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch> 3*4882a593Smuzhiyun * Copyright (C) 2004 Microtronix Datacom Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 6*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 7*4882a593Smuzhiyun * for more details. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _ASM_NIOS2_ENTRY_H 11*4882a593Smuzhiyun #define _ASM_NIOS2_ENTRY_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <asm/processor.h> 16*4882a593Smuzhiyun #include <asm/registers.h> 17*4882a593Smuzhiyun #include <asm/asm-offsets.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * Standard Nios2 interrupt entry and exit macros. 21*4882a593Smuzhiyun * Must be called with interrupts disabled. 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun .macro SAVE_ALL 24*4882a593Smuzhiyun rdctl r24, estatus 25*4882a593Smuzhiyun andi r24, r24, ESTATUS_EU 26*4882a593Smuzhiyun beq r24, r0, 1f /* In supervisor mode, already on kernel stack */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun movia r24, _current_thread /* Switch to current kernel stack */ 29*4882a593Smuzhiyun ldw r24, 0(r24) /* using the thread_info */ 30*4882a593Smuzhiyun addi r24, r24, THREAD_SIZE-PT_REGS_SIZE 31*4882a593Smuzhiyun stw sp, PT_SP(r24) /* Save user stack before changing */ 32*4882a593Smuzhiyun mov sp, r24 33*4882a593Smuzhiyun br 2f 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun 1 : mov r24, sp 36*4882a593Smuzhiyun addi sp, sp, -PT_REGS_SIZE /* Backup the kernel stack pointer */ 37*4882a593Smuzhiyun stw r24, PT_SP(sp) 38*4882a593Smuzhiyun 2 : stw r1, PT_R1(sp) 39*4882a593Smuzhiyun stw r2, PT_R2(sp) 40*4882a593Smuzhiyun stw r3, PT_R3(sp) 41*4882a593Smuzhiyun stw r4, PT_R4(sp) 42*4882a593Smuzhiyun stw r5, PT_R5(sp) 43*4882a593Smuzhiyun stw r6, PT_R6(sp) 44*4882a593Smuzhiyun stw r7, PT_R7(sp) 45*4882a593Smuzhiyun stw r8, PT_R8(sp) 46*4882a593Smuzhiyun stw r9, PT_R9(sp) 47*4882a593Smuzhiyun stw r10, PT_R10(sp) 48*4882a593Smuzhiyun stw r11, PT_R11(sp) 49*4882a593Smuzhiyun stw r12, PT_R12(sp) 50*4882a593Smuzhiyun stw r13, PT_R13(sp) 51*4882a593Smuzhiyun stw r14, PT_R14(sp) 52*4882a593Smuzhiyun stw r15, PT_R15(sp) 53*4882a593Smuzhiyun movi r24, -1 54*4882a593Smuzhiyun stw r24, PT_ORIG_R2(sp) 55*4882a593Smuzhiyun stw r7, PT_ORIG_R7(sp) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun stw ra, PT_RA(sp) 58*4882a593Smuzhiyun stw fp, PT_FP(sp) 59*4882a593Smuzhiyun stw gp, PT_GP(sp) 60*4882a593Smuzhiyun rdctl r24, estatus 61*4882a593Smuzhiyun stw r24, PT_ESTATUS(sp) 62*4882a593Smuzhiyun stw ea, PT_EA(sp) 63*4882a593Smuzhiyun .endm 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun .macro RESTORE_ALL 66*4882a593Smuzhiyun ldw r1, PT_R1(sp) /* Restore registers */ 67*4882a593Smuzhiyun ldw r2, PT_R2(sp) 68*4882a593Smuzhiyun ldw r3, PT_R3(sp) 69*4882a593Smuzhiyun ldw r4, PT_R4(sp) 70*4882a593Smuzhiyun ldw r5, PT_R5(sp) 71*4882a593Smuzhiyun ldw r6, PT_R6(sp) 72*4882a593Smuzhiyun ldw r7, PT_R7(sp) 73*4882a593Smuzhiyun ldw r8, PT_R8(sp) 74*4882a593Smuzhiyun ldw r9, PT_R9(sp) 75*4882a593Smuzhiyun ldw r10, PT_R10(sp) 76*4882a593Smuzhiyun ldw r11, PT_R11(sp) 77*4882a593Smuzhiyun ldw r12, PT_R12(sp) 78*4882a593Smuzhiyun ldw r13, PT_R13(sp) 79*4882a593Smuzhiyun ldw r14, PT_R14(sp) 80*4882a593Smuzhiyun ldw r15, PT_R15(sp) 81*4882a593Smuzhiyun ldw ra, PT_RA(sp) 82*4882a593Smuzhiyun ldw fp, PT_FP(sp) 83*4882a593Smuzhiyun ldw gp, PT_GP(sp) 84*4882a593Smuzhiyun ldw r24, PT_ESTATUS(sp) 85*4882a593Smuzhiyun wrctl estatus, r24 86*4882a593Smuzhiyun ldw ea, PT_EA(sp) 87*4882a593Smuzhiyun ldw sp, PT_SP(sp) /* Restore sp last */ 88*4882a593Smuzhiyun .endm 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun .macro SAVE_SWITCH_STACK 91*4882a593Smuzhiyun addi sp, sp, -SWITCH_STACK_SIZE 92*4882a593Smuzhiyun stw r16, SW_R16(sp) 93*4882a593Smuzhiyun stw r17, SW_R17(sp) 94*4882a593Smuzhiyun stw r18, SW_R18(sp) 95*4882a593Smuzhiyun stw r19, SW_R19(sp) 96*4882a593Smuzhiyun stw r20, SW_R20(sp) 97*4882a593Smuzhiyun stw r21, SW_R21(sp) 98*4882a593Smuzhiyun stw r22, SW_R22(sp) 99*4882a593Smuzhiyun stw r23, SW_R23(sp) 100*4882a593Smuzhiyun stw fp, SW_FP(sp) 101*4882a593Smuzhiyun stw gp, SW_GP(sp) 102*4882a593Smuzhiyun stw ra, SW_RA(sp) 103*4882a593Smuzhiyun .endm 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun .macro RESTORE_SWITCH_STACK 106*4882a593Smuzhiyun ldw r16, SW_R16(sp) 107*4882a593Smuzhiyun ldw r17, SW_R17(sp) 108*4882a593Smuzhiyun ldw r18, SW_R18(sp) 109*4882a593Smuzhiyun ldw r19, SW_R19(sp) 110*4882a593Smuzhiyun ldw r20, SW_R20(sp) 111*4882a593Smuzhiyun ldw r21, SW_R21(sp) 112*4882a593Smuzhiyun ldw r22, SW_R22(sp) 113*4882a593Smuzhiyun ldw r23, SW_R23(sp) 114*4882a593Smuzhiyun ldw fp, SW_FP(sp) 115*4882a593Smuzhiyun ldw gp, SW_GP(sp) 116*4882a593Smuzhiyun ldw ra, SW_RA(sp) 117*4882a593Smuzhiyun addi sp, sp, SWITCH_STACK_SIZE 118*4882a593Smuzhiyun .endm 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 121*4882a593Smuzhiyun #endif /* _ASM_NIOS2_ENTRY_H */ 122