1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (C) 2005-2017 Andes Technology Corporation
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include <linux/bitops.h>
5*4882a593Smuzhiyun #include <linux/cacheinfo.h>
6*4882a593Smuzhiyun #include <linux/cpu.h>
7*4882a593Smuzhiyun
ci_leaf_init(struct cacheinfo * this_leaf,enum cache_type type,unsigned int level)8*4882a593Smuzhiyun static void ci_leaf_init(struct cacheinfo *this_leaf,
9*4882a593Smuzhiyun enum cache_type type, unsigned int level)
10*4882a593Smuzhiyun {
11*4882a593Smuzhiyun char cache_type = (type & CACHE_TYPE_INST ? ICACHE : DCACHE);
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun this_leaf->level = level;
14*4882a593Smuzhiyun this_leaf->type = type;
15*4882a593Smuzhiyun this_leaf->coherency_line_size = CACHE_LINE_SIZE(cache_type);
16*4882a593Smuzhiyun this_leaf->number_of_sets = CACHE_SET(cache_type);
17*4882a593Smuzhiyun this_leaf->ways_of_associativity = CACHE_WAY(cache_type);
18*4882a593Smuzhiyun this_leaf->size = this_leaf->number_of_sets *
19*4882a593Smuzhiyun this_leaf->coherency_line_size * this_leaf->ways_of_associativity;
20*4882a593Smuzhiyun #if defined(CONFIG_CPU_DCACHE_WRITETHROUGH)
21*4882a593Smuzhiyun this_leaf->attributes = CACHE_WRITE_THROUGH;
22*4882a593Smuzhiyun #else
23*4882a593Smuzhiyun this_leaf->attributes = CACHE_WRITE_BACK;
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
init_cache_level(unsigned int cpu)27*4882a593Smuzhiyun int init_cache_level(unsigned int cpu)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* Only 1 level and I/D cache seperate. */
32*4882a593Smuzhiyun this_cpu_ci->num_levels = 1;
33*4882a593Smuzhiyun this_cpu_ci->num_leaves = 2;
34*4882a593Smuzhiyun return 0;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
populate_cache_leaves(unsigned int cpu)37*4882a593Smuzhiyun int populate_cache_leaves(unsigned int cpu)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun unsigned int level, idx;
40*4882a593Smuzhiyun struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
41*4882a593Smuzhiyun struct cacheinfo *this_leaf = this_cpu_ci->info_list;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
44*4882a593Smuzhiyun idx < this_cpu_ci->num_leaves; idx++, level++) {
45*4882a593Smuzhiyun ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
46*4882a593Smuzhiyun ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun }
50