1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * linux/arch/mips/tx4938/common/irq.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Common tx4938 irq handler
5*4882a593Smuzhiyun * Copyright (C) 2000-2001 Toshiba Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8*4882a593Smuzhiyun * terms of the GNU General Public License version 2. This program is
9*4882a593Smuzhiyun * licensed "as is" without any warranty of any kind, whether express
10*4882a593Smuzhiyun * or implied.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/irq.h>
17*4882a593Smuzhiyun #include <asm/irq_cpu.h>
18*4882a593Smuzhiyun #include <asm/txx9/tx4938.h>
19*4882a593Smuzhiyun
tx4938_irq_init(void)20*4882a593Smuzhiyun void __init tx4938_irq_init(void)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun int i;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun mips_cpu_irq_init();
25*4882a593Smuzhiyun txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL);
26*4882a593Smuzhiyun irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
27*4882a593Smuzhiyun handle_simple_irq);
28*4882a593Smuzhiyun /* raise priority for errors, timers, SIO */
29*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_ECCERR, 7);
30*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_WTOERR, 7);
31*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_PCIERR, 7);
32*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_PCIPME, 7);
33*4882a593Smuzhiyun for (i = 0; i < TX4938_NUM_IR_TMR; i++)
34*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_TMR(i), 6);
35*4882a593Smuzhiyun for (i = 0; i < TX4938_NUM_IR_SIO; i++)
36*4882a593Smuzhiyun txx9_irq_set_pri(TX4938_IR_SIO(i), 5);
37*4882a593Smuzhiyun }
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