1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Common tx4927 irq handler
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: MontaVista Software, Inc.
5*4882a593Smuzhiyun * source@mvista.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * under the terms of the GNU General Public License as published by the
8*4882a593Smuzhiyun * Free Software Foundation; either version 2 of the License, or (at your
9*4882a593Smuzhiyun * option) any later version.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12*4882a593Smuzhiyun * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
14*4882a593Smuzhiyun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15*4882a593Smuzhiyun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
16*4882a593Smuzhiyun * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
17*4882a593Smuzhiyun * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
18*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
19*4882a593Smuzhiyun * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
20*4882a593Smuzhiyun * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License along
23*4882a593Smuzhiyun * with this program; if not, write to the Free Software Foundation, Inc.,
24*4882a593Smuzhiyun * 675 Mass Ave, Cambridge, MA 02139, USA.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun #include <linux/init.h>
27*4882a593Smuzhiyun #include <linux/interrupt.h>
28*4882a593Smuzhiyun #include <linux/irq.h>
29*4882a593Smuzhiyun #include <asm/irq_cpu.h>
30*4882a593Smuzhiyun #include <asm/txx9/tx4927.h>
31*4882a593Smuzhiyun
tx4927_irq_init(void)32*4882a593Smuzhiyun void __init tx4927_irq_init(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun int i;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun mips_cpu_irq_init();
37*4882a593Smuzhiyun txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
38*4882a593Smuzhiyun irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
39*4882a593Smuzhiyun handle_simple_irq);
40*4882a593Smuzhiyun /* raise priority for errors, timers, SIO */
41*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
42*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
43*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
44*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
45*4882a593Smuzhiyun for (i = 0; i < TX4927_NUM_IR_TMR; i++)
46*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
47*4882a593Smuzhiyun for (i = 0; i < TX4927_NUM_IR_SIO; i++)
48*4882a593Smuzhiyun txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
49*4882a593Smuzhiyun }
50