1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/platform_device.h>
10*4882a593Smuzhiyun #include <linux/serial_8250.h>
11*4882a593Smuzhiyun #include <linux/rtc/ds1685.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <asm/ip32/mace.h>
14*4882a593Smuzhiyun #include <asm/ip32/ip32_ints.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun extern void ip32_prepare_poweroff(void);
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define MACEISA_SERIAL1_OFFS offsetof(struct sgi_mace, isa.serial1)
19*4882a593Smuzhiyun #define MACEISA_SERIAL2_OFFS offsetof(struct sgi_mace, isa.serial2)
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define MACE_PORT(offset,_irq) \
22*4882a593Smuzhiyun { \
23*4882a593Smuzhiyun .mapbase = MACE_BASE + offset, \
24*4882a593Smuzhiyun .irq = _irq, \
25*4882a593Smuzhiyun .uartclk = 1843200, \
26*4882a593Smuzhiyun .iotype = UPIO_MEM, \
27*4882a593Smuzhiyun .flags = UPF_SKIP_TEST|UPF_IOREMAP, \
28*4882a593Smuzhiyun .regshift = 8, \
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static struct plat_serial8250_port uart8250_data[] = {
32*4882a593Smuzhiyun MACE_PORT(MACEISA_SERIAL1_OFFS, MACEISA_SERIAL1_IRQ),
33*4882a593Smuzhiyun MACE_PORT(MACEISA_SERIAL2_OFFS, MACEISA_SERIAL2_IRQ),
34*4882a593Smuzhiyun { },
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static struct platform_device uart8250_device = {
38*4882a593Smuzhiyun .name = "serial8250",
39*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
40*4882a593Smuzhiyun .dev = {
41*4882a593Smuzhiyun .platform_data = uart8250_data,
42*4882a593Smuzhiyun },
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
uart8250_init(void)45*4882a593Smuzhiyun static int __init uart8250_init(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun return platform_device_register(&uart8250_device);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun device_initcall(uart8250_init);
51*4882a593Smuzhiyun
meth_devinit(void)52*4882a593Smuzhiyun static __init int meth_devinit(void)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct platform_device *pd;
55*4882a593Smuzhiyun int ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun pd = platform_device_alloc("meth", -1);
58*4882a593Smuzhiyun if (!pd)
59*4882a593Smuzhiyun return -ENOMEM;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun ret = platform_device_add(pd);
62*4882a593Smuzhiyun if (ret)
63*4882a593Smuzhiyun platform_device_put(pd);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return ret;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun device_initcall(meth_devinit);
69*4882a593Smuzhiyun
sgio2audio_devinit(void)70*4882a593Smuzhiyun static __init int sgio2audio_devinit(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct platform_device *pd;
73*4882a593Smuzhiyun int ret;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun pd = platform_device_alloc("sgio2audio", -1);
76*4882a593Smuzhiyun if (!pd)
77*4882a593Smuzhiyun return -ENOMEM;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun ret = platform_device_add(pd);
80*4882a593Smuzhiyun if (ret)
81*4882a593Smuzhiyun platform_device_put(pd);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun device_initcall(sgio2audio_devinit);
87*4882a593Smuzhiyun
sgio2btns_devinit(void)88*4882a593Smuzhiyun static __init int sgio2btns_devinit(void)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0));
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun device_initcall(sgio2btns_devinit);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #define MACE_RTC_RES_START (MACE_BASE + offsetof(struct sgi_mace, isa.rtc))
96*4882a593Smuzhiyun #define MACE_RTC_RES_END (MACE_RTC_RES_START + 32767)
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static struct resource ip32_rtc_resources[] = {
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun .start = MACEISA_RTC_IRQ,
101*4882a593Smuzhiyun .end = MACEISA_RTC_IRQ,
102*4882a593Smuzhiyun .flags = IORESOURCE_IRQ
103*4882a593Smuzhiyun }, {
104*4882a593Smuzhiyun .start = MACE_RTC_RES_START,
105*4882a593Smuzhiyun .end = MACE_RTC_RES_END,
106*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* RTC registers on IP32 are each padded by 256 bytes (0x100). */
111*4882a593Smuzhiyun static struct ds1685_rtc_platform_data
112*4882a593Smuzhiyun ip32_rtc_platform_data[] = {
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun .regstep = 0x100,
115*4882a593Smuzhiyun .bcd_mode = true,
116*4882a593Smuzhiyun .no_irq = false,
117*4882a593Smuzhiyun .uie_unsupported = false,
118*4882a593Smuzhiyun .access_type = ds1685_reg_direct,
119*4882a593Smuzhiyun .plat_prepare_poweroff = ip32_prepare_poweroff,
120*4882a593Smuzhiyun },
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun struct platform_device ip32_rtc_device = {
124*4882a593Smuzhiyun .name = "rtc-ds1685",
125*4882a593Smuzhiyun .id = -1,
126*4882a593Smuzhiyun .dev = {
127*4882a593Smuzhiyun .platform_data = ip32_rtc_platform_data,
128*4882a593Smuzhiyun },
129*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(ip32_rtc_resources),
130*4882a593Smuzhiyun .resource = ip32_rtc_resources,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
sgio2_rtc_devinit(void)133*4882a593Smuzhiyun static __init int sgio2_rtc_devinit(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun return platform_device_register(&ip32_rtc_device);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun device_initcall(sgio2_rtc_devinit);
139