1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5*4882a593Smuzhiyun * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6*4882a593Smuzhiyun * Copyright (C) 2013 John Crispin <john@phrozen.org>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/pm.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/reset-controller.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <asm/reboot.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/mach-ralink/ralink_regs.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* Reset Control */
20*4882a593Smuzhiyun #define SYSC_REG_RESET_CTRL 0x034
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define RSTCTL_RESET_PCI BIT(26)
23*4882a593Smuzhiyun #define RSTCTL_RESET_SYSTEM BIT(0)
24*4882a593Smuzhiyun
ralink_assert_device(struct reset_controller_dev * rcdev,unsigned long id)25*4882a593Smuzhiyun static int ralink_assert_device(struct reset_controller_dev *rcdev,
26*4882a593Smuzhiyun unsigned long id)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun u32 val;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun if (id < 8)
31*4882a593Smuzhiyun return -1;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
34*4882a593Smuzhiyun val |= BIT(id);
35*4882a593Smuzhiyun rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
ralink_deassert_device(struct reset_controller_dev * rcdev,unsigned long id)40*4882a593Smuzhiyun static int ralink_deassert_device(struct reset_controller_dev *rcdev,
41*4882a593Smuzhiyun unsigned long id)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun u32 val;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun if (id < 8)
46*4882a593Smuzhiyun return -1;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
49*4882a593Smuzhiyun val &= ~BIT(id);
50*4882a593Smuzhiyun rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
ralink_reset_device(struct reset_controller_dev * rcdev,unsigned long id)55*4882a593Smuzhiyun static int ralink_reset_device(struct reset_controller_dev *rcdev,
56*4882a593Smuzhiyun unsigned long id)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun ralink_assert_device(rcdev, id);
59*4882a593Smuzhiyun return ralink_deassert_device(rcdev, id);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static const struct reset_control_ops reset_ops = {
63*4882a593Smuzhiyun .reset = ralink_reset_device,
64*4882a593Smuzhiyun .assert = ralink_assert_device,
65*4882a593Smuzhiyun .deassert = ralink_deassert_device,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static struct reset_controller_dev reset_dev = {
69*4882a593Smuzhiyun .ops = &reset_ops,
70*4882a593Smuzhiyun .owner = THIS_MODULE,
71*4882a593Smuzhiyun .nr_resets = 32,
72*4882a593Smuzhiyun .of_reset_n_cells = 1,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
ralink_rst_init(void)75*4882a593Smuzhiyun void ralink_rst_init(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun reset_dev.of_node = of_find_compatible_node(NULL, NULL,
78*4882a593Smuzhiyun "ralink,rt2880-reset");
79*4882a593Smuzhiyun if (!reset_dev.of_node)
80*4882a593Smuzhiyun pr_err("Failed to find reset controller node");
81*4882a593Smuzhiyun else
82*4882a593Smuzhiyun reset_controller_register(&reset_dev);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
ralink_restart(char * command)85*4882a593Smuzhiyun static void ralink_restart(char *command)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_PCI)) {
88*4882a593Smuzhiyun rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
89*4882a593Smuzhiyun mdelay(50);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun local_irq_disable();
93*4882a593Smuzhiyun rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
94*4882a593Smuzhiyun unreachable();
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
mips_reboot_setup(void)97*4882a593Smuzhiyun static int __init mips_reboot_setup(void)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun _machine_restart = ralink_restart;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun arch_initcall(mips_reboot_setup);
105