1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Joshua Henderson <joshua.henderson@microchip.com> 4*4882a593Smuzhiyun * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #include <linux/clocksource.h> 7*4882a593Smuzhiyun #include <linux/init.h> 8*4882a593Smuzhiyun #include <linux/irqdomain.h> 9*4882a593Smuzhiyun #include <linux/of.h> 10*4882a593Smuzhiyun #include <linux/of_clk.h> 11*4882a593Smuzhiyun #include <linux/of_irq.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/time.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "pic32mzda.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun static const struct of_device_id pic32_infra_match[] = { 18*4882a593Smuzhiyun { .compatible = "microchip,pic32mzda-infra", }, 19*4882a593Smuzhiyun { }, 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define DEFAULT_CORE_TIMER_INTERRUPT 0 23*4882a593Smuzhiyun pic32_xlate_core_timer_irq(void)24*4882a593Smuzhiyunstatic unsigned int pic32_xlate_core_timer_irq(void) 25*4882a593Smuzhiyun { 26*4882a593Smuzhiyun struct device_node *node; 27*4882a593Smuzhiyun unsigned int irq; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun node = of_find_matching_node(NULL, pic32_infra_match); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun if (WARN_ON(!node)) 32*4882a593Smuzhiyun goto default_map; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun irq = irq_of_parse_and_map(node, 0); 35*4882a593Smuzhiyun if (!irq) 36*4882a593Smuzhiyun goto default_map; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun return irq; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun default_map: 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun return irq_create_mapping(NULL, DEFAULT_CORE_TIMER_INTERRUPT); 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun get_c0_compare_int(void)45*4882a593Smuzhiyununsigned int get_c0_compare_int(void) 46*4882a593Smuzhiyun { 47*4882a593Smuzhiyun return pic32_xlate_core_timer_irq(); 48*4882a593Smuzhiyun } 49*4882a593Smuzhiyun plat_time_init(void)50*4882a593Smuzhiyunvoid __init plat_time_init(void) 51*4882a593Smuzhiyun { 52*4882a593Smuzhiyun unsigned long rate = pic32_get_pbclk(7); 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun of_clk_init(NULL); 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun pr_info("CPU Clock: %ldMHz\n", rate / 1000000); 57*4882a593Smuzhiyun mips_hpt_frequency = rate / 2; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun timer_probe(); 60*4882a593Smuzhiyun } 61