1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Joshua Henderson <joshua.henderson@microchip.com> 4*4882a593Smuzhiyun * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #include <linux/init.h> 7*4882a593Smuzhiyun #include <linux/pm.h> 8*4882a593Smuzhiyun #include <asm/reboot.h> 9*4882a593Smuzhiyun #include <asm/mach-pic32/pic32.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define PIC32_RSWRST 0x10 12*4882a593Smuzhiyun pic32_halt(void)13*4882a593Smuzhiyunstatic void pic32_halt(void) 14*4882a593Smuzhiyun { 15*4882a593Smuzhiyun while (1) { 16*4882a593Smuzhiyun __asm__(".set push;\n" 17*4882a593Smuzhiyun ".set arch=r4000;\n" 18*4882a593Smuzhiyun "wait;\n" 19*4882a593Smuzhiyun ".set pop;\n" 20*4882a593Smuzhiyun ); 21*4882a593Smuzhiyun } 22*4882a593Smuzhiyun } 23*4882a593Smuzhiyun pic32_machine_restart(char * command)24*4882a593Smuzhiyunstatic void pic32_machine_restart(char *command) 25*4882a593Smuzhiyun { 26*4882a593Smuzhiyun void __iomem *reg = 27*4882a593Smuzhiyun ioremap(PIC32_BASE_RESET + PIC32_RSWRST, sizeof(u32)); 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun pic32_syskey_unlock(); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* magic write/read */ 32*4882a593Smuzhiyun __raw_writel(1, reg); 33*4882a593Smuzhiyun (void)__raw_readl(reg); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun pic32_halt(); 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun pic32_machine_halt(void)38*4882a593Smuzhiyunstatic void pic32_machine_halt(void) 39*4882a593Smuzhiyun { 40*4882a593Smuzhiyun local_irq_disable(); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun pic32_halt(); 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun mips_reboot_setup(void)45*4882a593Smuzhiyunstatic int __init mips_reboot_setup(void) 46*4882a593Smuzhiyun { 47*4882a593Smuzhiyun _machine_restart = pic32_machine_restart; 48*4882a593Smuzhiyun _machine_halt = pic32_machine_halt; 49*4882a593Smuzhiyun pm_power_off = pic32_machine_halt; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun return 0; 52*4882a593Smuzhiyun } 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun arch_initcall(mips_reboot_setup); 55