1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
3*4882a593Smuzhiyun * and RBTX49xx patch from CELF patch archive.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2001, 2003-2005 MontaVista Software Inc.
6*4882a593Smuzhiyun * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
7*4882a593Smuzhiyun * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
10*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
11*4882a593Smuzhiyun * for more details.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <asm/txx9/generic.h>
18*4882a593Smuzhiyun #include <asm/txx9/tx4927.h>
19*4882a593Smuzhiyun
tx4927_report_pciclk(void)20*4882a593Smuzhiyun int __init tx4927_report_pciclk(void)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun int pciclk = 0;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun pr_info("PCIC --%s PCICLK:",
25*4882a593Smuzhiyun (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
26*4882a593Smuzhiyun " PCI66" : "");
27*4882a593Smuzhiyun if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
28*4882a593Smuzhiyun u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
29*4882a593Smuzhiyun switch ((unsigned long)ccfg &
30*4882a593Smuzhiyun TX4927_CCFG_PCIDIVMODE_MASK) {
31*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_2_5:
32*4882a593Smuzhiyun pciclk = txx9_cpu_clock * 2 / 5; break;
33*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_3:
34*4882a593Smuzhiyun pciclk = txx9_cpu_clock / 3; break;
35*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_5:
36*4882a593Smuzhiyun pciclk = txx9_cpu_clock / 5; break;
37*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_6:
38*4882a593Smuzhiyun pciclk = txx9_cpu_clock / 6; break;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun pr_cont("Internal(%u.%uMHz)",
41*4882a593Smuzhiyun (pciclk + 50000) / 1000000,
42*4882a593Smuzhiyun ((pciclk + 50000) / 100000) % 10);
43*4882a593Smuzhiyun } else {
44*4882a593Smuzhiyun pr_cont("External");
45*4882a593Smuzhiyun pciclk = -1;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun pr_cont("\n");
48*4882a593Smuzhiyun return pciclk;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
tx4927_pciclk66_setup(void)51*4882a593Smuzhiyun int __init tx4927_pciclk66_setup(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun int pciclk;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Assert M66EN */
56*4882a593Smuzhiyun tx4927_ccfg_set(TX4927_CCFG_PCI66);
57*4882a593Smuzhiyun /* Double PCICLK (if possible) */
58*4882a593Smuzhiyun if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
59*4882a593Smuzhiyun unsigned int pcidivmode = 0;
60*4882a593Smuzhiyun u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
61*4882a593Smuzhiyun pcidivmode = (unsigned long)ccfg &
62*4882a593Smuzhiyun TX4927_CCFG_PCIDIVMODE_MASK;
63*4882a593Smuzhiyun switch (pcidivmode) {
64*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_5:
65*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_2_5:
66*4882a593Smuzhiyun pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
67*4882a593Smuzhiyun pciclk = txx9_cpu_clock * 2 / 5;
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_6:
70*4882a593Smuzhiyun case TX4927_CCFG_PCIDIVMODE_3:
71*4882a593Smuzhiyun default:
72*4882a593Smuzhiyun pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
73*4882a593Smuzhiyun pciclk = txx9_cpu_clock / 3;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
76*4882a593Smuzhiyun pcidivmode);
77*4882a593Smuzhiyun pr_debug("PCICLK: ccfg:%08lx\n",
78*4882a593Smuzhiyun (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
79*4882a593Smuzhiyun } else
80*4882a593Smuzhiyun pciclk = -1;
81*4882a593Smuzhiyun return pciclk;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
tx4927_setup_pcierr_irq(void)84*4882a593Smuzhiyun void __init tx4927_setup_pcierr_irq(void)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun if (request_irq(TXX9_IRQ_BASE + TX4927_IR_PCIERR,
87*4882a593Smuzhiyun tx4927_pcierr_interrupt,
88*4882a593Smuzhiyun 0, "PCI error",
89*4882a593Smuzhiyun (void *)TX4927_PCIC_REG))
90*4882a593Smuzhiyun pr_warn("Failed to request irq for PCIERR\n");
91*4882a593Smuzhiyun }
92