1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
4*4882a593Smuzhiyun * All rights reserved.
5*4882a593Smuzhiyun * Authors: Carsten Langgaard <carstenl@mips.com>
6*4882a593Smuzhiyun * Maciej W. Rozycki <macro@mips.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * MIPS boards specific PCI support.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun #include <linux/pci.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <asm/mips-boards/bonito64.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define PCI_ACCESS_READ 0
17*4882a593Smuzhiyun #define PCI_ACCESS_WRITE 1
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
20*4882a593Smuzhiyun #define ID_SEL_BEGIN 10
21*4882a593Smuzhiyun #define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun
bonito64_pcibios_config_access(unsigned char access_type,struct pci_bus * bus,unsigned int devfn,int where,u32 * data)24*4882a593Smuzhiyun static int bonito64_pcibios_config_access(unsigned char access_type,
25*4882a593Smuzhiyun struct pci_bus *bus,
26*4882a593Smuzhiyun unsigned int devfn, int where,
27*4882a593Smuzhiyun u32 * data)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun u32 busnum = bus->number;
30*4882a593Smuzhiyun u32 addr, type;
31*4882a593Smuzhiyun u32 dummy;
32*4882a593Smuzhiyun void *addrp;
33*4882a593Smuzhiyun int device = PCI_SLOT(devfn);
34*4882a593Smuzhiyun int function = PCI_FUNC(devfn);
35*4882a593Smuzhiyun int reg = where & ~3;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (busnum == 0) {
38*4882a593Smuzhiyun /* Type 0 configuration for onboard PCI bus */
39*4882a593Smuzhiyun if (device > MAX_DEV_NUM)
40*4882a593Smuzhiyun return -1;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
43*4882a593Smuzhiyun type = 0;
44*4882a593Smuzhiyun } else {
45*4882a593Smuzhiyun /* Type 1 configuration for offboard PCI bus */
46*4882a593Smuzhiyun addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
47*4882a593Smuzhiyun type = 0x10000;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Clear aborts */
51*4882a593Smuzhiyun BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun BONITO_PCIMAP_CFG = (addr >> 16) | type;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Flush Bonito register block */
56*4882a593Smuzhiyun dummy = BONITO_PCIMAP_CFG;
57*4882a593Smuzhiyun mmiowb();
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun addrp = CFG_SPACE_REG(addr & 0xffff);
60*4882a593Smuzhiyun if (access_type == PCI_ACCESS_WRITE) {
61*4882a593Smuzhiyun writel(cpu_to_le32(*data), addrp);
62*4882a593Smuzhiyun /* Wait till done */
63*4882a593Smuzhiyun while (BONITO_PCIMSTAT & 0xF);
64*4882a593Smuzhiyun } else {
65*4882a593Smuzhiyun *data = le32_to_cpu(readl(addrp));
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Detect Master/Target abort */
69*4882a593Smuzhiyun if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR |
70*4882a593Smuzhiyun BONITO_PCICMD_MTABORT_CLR)) {
71*4882a593Smuzhiyun /* Error occurred */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Clear bits */
74*4882a593Smuzhiyun BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
75*4882a593Smuzhiyun BONITO_PCICMD_MTABORT_CLR);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return -1;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * We can't address 8 and 16 bit words directly. Instead we have to
87*4882a593Smuzhiyun * read/write a 32bit word and mask/modify the data we actually want.
88*4882a593Smuzhiyun */
bonito64_pcibios_read(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * val)89*4882a593Smuzhiyun static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
90*4882a593Smuzhiyun int where, int size, u32 * val)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun u32 data = 0;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun if ((size == 2) && (where & 1))
95*4882a593Smuzhiyun return PCIBIOS_BAD_REGISTER_NUMBER;
96*4882a593Smuzhiyun else if ((size == 4) && (where & 3))
97*4882a593Smuzhiyun return PCIBIOS_BAD_REGISTER_NUMBER;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
100*4882a593Smuzhiyun &data))
101*4882a593Smuzhiyun return -1;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun if (size == 1)
104*4882a593Smuzhiyun *val = (data >> ((where & 3) << 3)) & 0xff;
105*4882a593Smuzhiyun else if (size == 2)
106*4882a593Smuzhiyun *val = (data >> ((where & 3) << 3)) & 0xffff;
107*4882a593Smuzhiyun else
108*4882a593Smuzhiyun *val = data;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return PCIBIOS_SUCCESSFUL;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
bonito64_pcibios_write(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 val)113*4882a593Smuzhiyun static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
114*4882a593Smuzhiyun int where, int size, u32 val)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun u32 data = 0;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if ((size == 2) && (where & 1))
119*4882a593Smuzhiyun return PCIBIOS_BAD_REGISTER_NUMBER;
120*4882a593Smuzhiyun else if ((size == 4) && (where & 3))
121*4882a593Smuzhiyun return PCIBIOS_BAD_REGISTER_NUMBER;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (size == 4)
124*4882a593Smuzhiyun data = val;
125*4882a593Smuzhiyun else {
126*4882a593Smuzhiyun if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
127*4882a593Smuzhiyun where, &data))
128*4882a593Smuzhiyun return -1;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (size == 1)
131*4882a593Smuzhiyun data = (data & ~(0xff << ((where & 3) << 3))) |
132*4882a593Smuzhiyun (val << ((where & 3) << 3));
133*4882a593Smuzhiyun else if (size == 2)
134*4882a593Smuzhiyun data = (data & ~(0xffff << ((where & 3) << 3))) |
135*4882a593Smuzhiyun (val << ((where & 3) << 3));
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
139*4882a593Smuzhiyun &data))
140*4882a593Smuzhiyun return -1;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return PCIBIOS_SUCCESSFUL;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun struct pci_ops bonito64_pci_ops = {
146*4882a593Smuzhiyun .read = bonito64_pcibios_read,
147*4882a593Smuzhiyun .write = bonito64_pcibios_write
148*4882a593Smuzhiyun };
149