1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SNI specific PCI support for RM200/RM300.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 1997 - 2000, 2003, 04 Ralf Baechle (ralf@linux-mips.org)
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <asm/mipsregs.h>
15*4882a593Smuzhiyun #include <asm/sni.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <irq.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun * PCIMT Shortcuts ...
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun #define SCSI PCIMT_IRQ_SCSI
23*4882a593Smuzhiyun #define ETH PCIMT_IRQ_ETHERNET
24*4882a593Smuzhiyun #define INTA PCIMT_IRQ_INTA
25*4882a593Smuzhiyun #define INTB PCIMT_IRQ_INTB
26*4882a593Smuzhiyun #define INTC PCIMT_IRQ_INTC
27*4882a593Smuzhiyun #define INTD PCIMT_IRQ_INTD
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun * Device 0: PCI EISA Bridge (directly routed)
31*4882a593Smuzhiyun * Device 1: NCR53c810 SCSI (directly routed)
32*4882a593Smuzhiyun * Device 2: PCnet32 Ethernet (directly routed)
33*4882a593Smuzhiyun * Device 3: VGA (routed to INTB)
34*4882a593Smuzhiyun * Device 4: Unused
35*4882a593Smuzhiyun * Device 5: Slot 2
36*4882a593Smuzhiyun * Device 6: Slot 3
37*4882a593Smuzhiyun * Device 7: Slot 4
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * Documentation says the VGA is device 5 and device 3 is unused but that
40*4882a593Smuzhiyun * seem to be a documentation error. At least on my RM200C the Cirrus
41*4882a593Smuzhiyun * Logic CL-GD5434 VGA is device 3.
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun static char irq_tab_rm200[8][5] = {
44*4882a593Smuzhiyun /* INTA INTB INTC INTD */
45*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* EISA bridge */
46*4882a593Smuzhiyun { SCSI, SCSI, SCSI, SCSI, SCSI }, /* SCSI */
47*4882a593Smuzhiyun { ETH, ETH, ETH, ETH, ETH }, /* Ethernet */
48*4882a593Smuzhiyun { INTB, INTB, INTB, INTB, INTB }, /* VGA */
49*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
50*4882a593Smuzhiyun { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
51*4882a593Smuzhiyun { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
52*4882a593Smuzhiyun { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun * In Revision D of the RM300 Device 2 has become a normal purpose Slot 1
57*4882a593Smuzhiyun *
58*4882a593Smuzhiyun * The VGA card is optional for RM300 systems.
59*4882a593Smuzhiyun */
60*4882a593Smuzhiyun static char irq_tab_rm300d[8][5] = {
61*4882a593Smuzhiyun /* INTA INTB INTC INTD */
62*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* EISA bridge */
63*4882a593Smuzhiyun { SCSI, SCSI, SCSI, SCSI, SCSI }, /* SCSI */
64*4882a593Smuzhiyun { 0, INTC, INTD, INTA, INTB }, /* Slot 1 */
65*4882a593Smuzhiyun { INTB, INTB, INTB, INTB, INTB }, /* VGA */
66*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
67*4882a593Smuzhiyun { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
68*4882a593Smuzhiyun { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
69*4882a593Smuzhiyun { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static char irq_tab_rm300e[5][5] = {
73*4882a593Smuzhiyun /* INTA INTB INTC INTD */
74*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* HOST bridge */
75*4882a593Smuzhiyun { SCSI, SCSI, SCSI, SCSI, SCSI }, /* SCSI */
76*4882a593Smuzhiyun { 0, INTC, INTD, INTA, INTB }, /* Bridge/i960 */
77*4882a593Smuzhiyun { 0, INTD, INTA, INTB, INTC }, /* Slot 1 */
78*4882a593Smuzhiyun { 0, INTA, INTB, INTC, INTD }, /* Slot 2 */
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun #undef SCSI
81*4882a593Smuzhiyun #undef ETH
82*4882a593Smuzhiyun #undef INTA
83*4882a593Smuzhiyun #undef INTB
84*4882a593Smuzhiyun #undef INTC
85*4882a593Smuzhiyun #undef INTD
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun * PCIT Shortcuts ...
90*4882a593Smuzhiyun */
91*4882a593Smuzhiyun #define SCSI0 PCIT_IRQ_SCSI0
92*4882a593Smuzhiyun #define SCSI1 PCIT_IRQ_SCSI1
93*4882a593Smuzhiyun #define ETH PCIT_IRQ_ETHERNET
94*4882a593Smuzhiyun #define INTA PCIT_IRQ_INTA
95*4882a593Smuzhiyun #define INTB PCIT_IRQ_INTB
96*4882a593Smuzhiyun #define INTC PCIT_IRQ_INTC
97*4882a593Smuzhiyun #define INTD PCIT_IRQ_INTD
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static char irq_tab_pcit[13][5] = {
100*4882a593Smuzhiyun /* INTA INTB INTC INTD */
101*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* HOST bridge */
102*4882a593Smuzhiyun { SCSI0, SCSI0, SCSI0, SCSI0, SCSI0 }, /* SCSI */
103*4882a593Smuzhiyun { SCSI1, SCSI1, SCSI1, SCSI1, SCSI1 }, /* SCSI */
104*4882a593Smuzhiyun { ETH, ETH, ETH, ETH, ETH }, /* Ethernet */
105*4882a593Smuzhiyun { 0, INTA, INTB, INTC, INTD }, /* PCI-PCI bridge */
106*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
107*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
108*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
109*4882a593Smuzhiyun { 0, INTA, INTB, INTC, INTD }, /* Slot 1 */
110*4882a593Smuzhiyun { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
111*4882a593Smuzhiyun { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
112*4882a593Smuzhiyun { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
113*4882a593Smuzhiyun { 0, INTA, INTB, INTC, INTD }, /* Slot 5 */
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static char irq_tab_pcit_cplus[13][5] = {
117*4882a593Smuzhiyun /* INTA INTB INTC INTD */
118*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* HOST bridge */
119*4882a593Smuzhiyun { 0, INTB, INTC, INTD, INTA }, /* PCI Slot 9 */
120*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* PCI-EISA */
121*4882a593Smuzhiyun { 0, 0, 0, 0, 0 }, /* Unused */
122*4882a593Smuzhiyun { 0, INTA, INTB, INTC, INTD }, /* PCI-PCI bridge */
123*4882a593Smuzhiyun { 0, INTB, INTC, INTD, INTA }, /* fixup */
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
is_rm300_revd(void)126*4882a593Smuzhiyun static inline int is_rm300_revd(void)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun unsigned char csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return (csmsr & 0xa0) == 0x20;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
pcibios_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)133*4882a593Smuzhiyun int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun switch (sni_brd_type) {
136*4882a593Smuzhiyun case SNI_BRD_PCI_TOWER_CPLUS:
137*4882a593Smuzhiyun if (slot == 4) {
138*4882a593Smuzhiyun /*
139*4882a593Smuzhiyun * SNI messed up interrupt wiring for onboard
140*4882a593Smuzhiyun * PCI bus 1; we need to fix this up here
141*4882a593Smuzhiyun */
142*4882a593Smuzhiyun while (dev && dev->bus->number != 1)
143*4882a593Smuzhiyun dev = dev->bus->self;
144*4882a593Smuzhiyun if (dev && dev->devfn >= PCI_DEVFN(4, 0))
145*4882a593Smuzhiyun slot = 5;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun return irq_tab_pcit_cplus[slot][pin];
148*4882a593Smuzhiyun case SNI_BRD_PCI_TOWER:
149*4882a593Smuzhiyun return irq_tab_pcit[slot][pin];
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun case SNI_BRD_PCI_MTOWER:
152*4882a593Smuzhiyun if (is_rm300_revd())
153*4882a593Smuzhiyun return irq_tab_rm300d[slot][pin];
154*4882a593Smuzhiyun fallthrough;
155*4882a593Smuzhiyun case SNI_BRD_PCI_DESKTOP:
156*4882a593Smuzhiyun return irq_tab_rm200[slot][pin];
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun case SNI_BRD_PCI_MTOWER_CPLUS:
159*4882a593Smuzhiyun return irq_tab_rm300e[slot][pin];
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return 0;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* Do platform specific device initialization at pci_enable_device() time */
pcibios_plat_dev_init(struct pci_dev * dev)166*4882a593Smuzhiyun int pcibios_plat_dev_init(struct pci_dev *dev)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun return 0;
169*4882a593Smuzhiyun }
170