xref: /OK3568_Linux_fs/kernel/arch/mips/netlogic/xlp/cop2-ex.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun  * for more details.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2013 Broadcom Corporation.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * based on arch/mips/cavium-octeon/cpu.c
9*4882a593Smuzhiyun  * Copyright (C) 2009 Wind River Systems,
10*4882a593Smuzhiyun  *   written by Ralf Baechle <ralf@linux-mips.org>
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun #include <linux/capability.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/irqflags.h>
15*4882a593Smuzhiyun #include <linux/notifier.h>
16*4882a593Smuzhiyun #include <linux/prefetch.h>
17*4882a593Smuzhiyun #include <linux/ptrace.h>
18*4882a593Smuzhiyun #include <linux/sched.h>
19*4882a593Smuzhiyun #include <linux/sched/task_stack.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <asm/cop2.h>
22*4882a593Smuzhiyun #include <asm/current.h>
23*4882a593Smuzhiyun #include <asm/mipsregs.h>
24*4882a593Smuzhiyun #include <asm/page.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <asm/netlogic/mips-extns.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun  * 64 bit ops are done in inline assembly to support 32 bit
30*4882a593Smuzhiyun  * compilation
31*4882a593Smuzhiyun  */
nlm_cop2_save(struct nlm_cop2_state * r)32*4882a593Smuzhiyun void nlm_cop2_save(struct nlm_cop2_state *r)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	asm volatile(
35*4882a593Smuzhiyun 		".set	push\n"
36*4882a593Smuzhiyun 		".set	noat\n"
37*4882a593Smuzhiyun 		"dmfc2	$1, $0, 0\n"
38*4882a593Smuzhiyun 		"sd	$1, 0(%1)\n"
39*4882a593Smuzhiyun 		"dmfc2	$1, $0, 1\n"
40*4882a593Smuzhiyun 		"sd	$1, 8(%1)\n"
41*4882a593Smuzhiyun 		"dmfc2	$1, $0, 2\n"
42*4882a593Smuzhiyun 		"sd	$1, 16(%1)\n"
43*4882a593Smuzhiyun 		"dmfc2	$1, $0, 3\n"
44*4882a593Smuzhiyun 		"sd	$1, 24(%1)\n"
45*4882a593Smuzhiyun 		"dmfc2	$1, $1, 0\n"
46*4882a593Smuzhiyun 		"sd	$1, 0(%2)\n"
47*4882a593Smuzhiyun 		"dmfc2	$1, $1, 1\n"
48*4882a593Smuzhiyun 		"sd	$1, 8(%2)\n"
49*4882a593Smuzhiyun 		"dmfc2	$1, $1, 2\n"
50*4882a593Smuzhiyun 		"sd	$1, 16(%2)\n"
51*4882a593Smuzhiyun 		"dmfc2	$1, $1, 3\n"
52*4882a593Smuzhiyun 		"sd	$1, 24(%2)\n"
53*4882a593Smuzhiyun 		".set	pop\n"
54*4882a593Smuzhiyun 		: "=m"(*r)
55*4882a593Smuzhiyun 		: "r"(r->tx), "r"(r->rx));
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	r->tx_msg_status = __read_32bit_c2_register($2, 0);
58*4882a593Smuzhiyun 	r->rx_msg_status = __read_32bit_c2_register($3, 0) & 0x0fffffff;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
nlm_cop2_restore(struct nlm_cop2_state * r)61*4882a593Smuzhiyun void nlm_cop2_restore(struct nlm_cop2_state *r)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	u32 rstat;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	asm volatile(
66*4882a593Smuzhiyun 		".set	push\n"
67*4882a593Smuzhiyun 		".set	noat\n"
68*4882a593Smuzhiyun 		"ld	$1, 0(%1)\n"
69*4882a593Smuzhiyun 		"dmtc2	$1, $0, 0\n"
70*4882a593Smuzhiyun 		"ld	$1, 8(%1)\n"
71*4882a593Smuzhiyun 		"dmtc2	$1, $0, 1\n"
72*4882a593Smuzhiyun 		"ld	$1, 16(%1)\n"
73*4882a593Smuzhiyun 		"dmtc2	$1, $0, 2\n"
74*4882a593Smuzhiyun 		"ld	$1, 24(%1)\n"
75*4882a593Smuzhiyun 		"dmtc2	$1, $0, 3\n"
76*4882a593Smuzhiyun 		"ld	$1, 0(%2)\n"
77*4882a593Smuzhiyun 		"dmtc2	$1, $1, 0\n"
78*4882a593Smuzhiyun 		"ld	$1, 8(%2)\n"
79*4882a593Smuzhiyun 		"dmtc2	$1, $1, 1\n"
80*4882a593Smuzhiyun 		"ld	$1, 16(%2)\n"
81*4882a593Smuzhiyun 		"dmtc2	$1, $1, 2\n"
82*4882a593Smuzhiyun 		"ld	$1, 24(%2)\n"
83*4882a593Smuzhiyun 		"dmtc2	$1, $1, 3\n"
84*4882a593Smuzhiyun 		".set	pop\n"
85*4882a593Smuzhiyun 		: : "m"(*r), "r"(r->tx), "r"(r->rx));
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	__write_32bit_c2_register($2, 0, r->tx_msg_status);
88*4882a593Smuzhiyun 	rstat = __read_32bit_c2_register($3, 0) & 0xf0000000u;
89*4882a593Smuzhiyun 	__write_32bit_c2_register($3, 0, r->rx_msg_status | rstat);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
nlm_cu2_call(struct notifier_block * nfb,unsigned long action,void * data)92*4882a593Smuzhiyun static int nlm_cu2_call(struct notifier_block *nfb, unsigned long action,
93*4882a593Smuzhiyun 	void *data)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	unsigned long flags;
96*4882a593Smuzhiyun 	unsigned int status;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	switch (action) {
99*4882a593Smuzhiyun 	case CU2_EXCEPTION:
100*4882a593Smuzhiyun 		if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
101*4882a593Smuzhiyun 			break;
102*4882a593Smuzhiyun 		local_irq_save(flags);
103*4882a593Smuzhiyun 		KSTK_STATUS(current) |= ST0_CU2;
104*4882a593Smuzhiyun 		status = read_c0_status();
105*4882a593Smuzhiyun 		write_c0_status(status | ST0_CU2);
106*4882a593Smuzhiyun 		nlm_cop2_restore(&(current->thread.cp2));
107*4882a593Smuzhiyun 		write_c0_status(status & ~ST0_CU2);
108*4882a593Smuzhiyun 		local_irq_restore(flags);
109*4882a593Smuzhiyun 		pr_info("COP2 access enabled for pid %d (%s)\n",
110*4882a593Smuzhiyun 					current->pid, current->comm);
111*4882a593Smuzhiyun 		return NOTIFY_BAD;	/* Don't call default notifier */
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return NOTIFY_OK;		/* Let default notifier send signals */
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
nlm_cu2_setup(void)117*4882a593Smuzhiyun static int __init nlm_cu2_setup(void)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	return cu2_notifier(nlm_cu2_call, 0);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun early_initcall(nlm_cu2_setup);
122