xref: /OK3568_Linux_fs/kernel/arch/mips/math-emu/sp_sub.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* IEEE754 floating point arithmetic
3*4882a593Smuzhiyun  * single precision
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun  * MIPS floating point support
7*4882a593Smuzhiyun  * Copyright (C) 1994-2000 Algorithmics Ltd.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include "ieee754sp.h"
11*4882a593Smuzhiyun 
ieee754sp_sub(union ieee754sp x,union ieee754sp y)12*4882a593Smuzhiyun union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun 	int s;
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun 	COMPXSP;
17*4882a593Smuzhiyun 	COMPYSP;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun 	EXPLODEXSP;
20*4882a593Smuzhiyun 	EXPLODEYSP;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	ieee754_clearcx();
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	FLUSHXSP;
25*4882a593Smuzhiyun 	FLUSHYSP;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	switch (CLPAIR(xc, yc)) {
28*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
29*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
30*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
31*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
32*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
33*4882a593Smuzhiyun 		return ieee754sp_nanxcpt(y);
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
36*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
37*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
38*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
39*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
40*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
41*4882a593Smuzhiyun 		return ieee754sp_nanxcpt(x);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
44*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
45*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
46*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
47*4882a593Smuzhiyun 		return y;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
50*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
51*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
52*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
53*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
54*4882a593Smuzhiyun 		return x;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	/*
58*4882a593Smuzhiyun 	 * Infinity handling
59*4882a593Smuzhiyun 	 */
60*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
61*4882a593Smuzhiyun 		if (xs != ys)
62*4882a593Smuzhiyun 			return x;
63*4882a593Smuzhiyun 		ieee754_setcx(IEEE754_INVALID_OPERATION);
64*4882a593Smuzhiyun 		return ieee754sp_indef();
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
67*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
68*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
69*4882a593Smuzhiyun 		return ieee754sp_inf(ys ^ 1);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
72*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
73*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
74*4882a593Smuzhiyun 		return x;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	/*
77*4882a593Smuzhiyun 	 * Zero handling
78*4882a593Smuzhiyun 	 */
79*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
80*4882a593Smuzhiyun 		if (xs != ys)
81*4882a593Smuzhiyun 			return x;
82*4882a593Smuzhiyun 		else
83*4882a593Smuzhiyun 			return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
86*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
87*4882a593Smuzhiyun 		return x;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
90*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
91*4882a593Smuzhiyun 		/* quick fix up */
92*4882a593Smuzhiyun 		SPSIGN(y) ^= 1;
93*4882a593Smuzhiyun 		return y;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
96*4882a593Smuzhiyun 		SPDNORMX;
97*4882a593Smuzhiyun 		fallthrough;
98*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
99*4882a593Smuzhiyun 		SPDNORMY;
100*4882a593Smuzhiyun 		break;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
103*4882a593Smuzhiyun 		SPDNORMX;
104*4882a593Smuzhiyun 		break;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
107*4882a593Smuzhiyun 		break;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 	/* flip sign of y and handle as add */
110*4882a593Smuzhiyun 	ys ^= 1;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	assert(xm & SP_HIDDEN_BIT);
113*4882a593Smuzhiyun 	assert(ym & SP_HIDDEN_BIT);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* provide guard,round and stick bit space */
117*4882a593Smuzhiyun 	xm <<= 3;
118*4882a593Smuzhiyun 	ym <<= 3;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (xe > ye) {
121*4882a593Smuzhiyun 		/*
122*4882a593Smuzhiyun 		 * have to shift y fraction right to align
123*4882a593Smuzhiyun 		 */
124*4882a593Smuzhiyun 		s = xe - ye;
125*4882a593Smuzhiyun 		ym = XSPSRS(ym, s);
126*4882a593Smuzhiyun 		ye += s;
127*4882a593Smuzhiyun 	} else if (ye > xe) {
128*4882a593Smuzhiyun 		/*
129*4882a593Smuzhiyun 		 * have to shift x fraction right to align
130*4882a593Smuzhiyun 		 */
131*4882a593Smuzhiyun 		s = ye - xe;
132*4882a593Smuzhiyun 		xm = XSPSRS(xm, s);
133*4882a593Smuzhiyun 		xe += s;
134*4882a593Smuzhiyun 	}
135*4882a593Smuzhiyun 	assert(xe == ye);
136*4882a593Smuzhiyun 	assert(xe <= SP_EMAX);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	if (xs == ys) {
139*4882a593Smuzhiyun 		/* generate 28 bit result of adding two 27 bit numbers
140*4882a593Smuzhiyun 		 */
141*4882a593Smuzhiyun 		xm = xm + ym;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 		if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
144*4882a593Smuzhiyun 			SPXSRSX1();	/* shift preserving sticky */
145*4882a593Smuzhiyun 		}
146*4882a593Smuzhiyun 	} else {
147*4882a593Smuzhiyun 		if (xm >= ym) {
148*4882a593Smuzhiyun 			xm = xm - ym;
149*4882a593Smuzhiyun 		} else {
150*4882a593Smuzhiyun 			xm = ym - xm;
151*4882a593Smuzhiyun 			xs = ys;
152*4882a593Smuzhiyun 		}
153*4882a593Smuzhiyun 		if (xm == 0) {
154*4882a593Smuzhiyun 			if (ieee754_csr.rm == FPU_CSR_RD)
155*4882a593Smuzhiyun 				return ieee754sp_zero(1);	/* round negative inf. => sign = -1 */
156*4882a593Smuzhiyun 			else
157*4882a593Smuzhiyun 				return ieee754sp_zero(0);	/* other round modes   => sign = 1 */
158*4882a593Smuzhiyun 		}
159*4882a593Smuzhiyun 		/* normalize to rounding precision
160*4882a593Smuzhiyun 		 */
161*4882a593Smuzhiyun 		while ((xm >> (SP_FBITS + 3)) == 0) {
162*4882a593Smuzhiyun 			xm <<= 1;
163*4882a593Smuzhiyun 			xe--;
164*4882a593Smuzhiyun 		}
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	return ieee754sp_format(xs, xe, xm);
168*4882a593Smuzhiyun }
169