1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* IEEE754 floating point arithmetic 3*4882a593Smuzhiyun * single precision 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * MIPS floating point support 7*4882a593Smuzhiyun * Copyright (C) 1994-2000 Algorithmics Ltd. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "ieee754sp.h" 11*4882a593Smuzhiyun #include "ieee754dp.h" 12*4882a593Smuzhiyun ieee754sp_nan_fdp(int xs,u64 xm)13*4882a593Smuzhiyunstatic inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm) 14*4882a593Smuzhiyun { 15*4882a593Smuzhiyun return buildsp(xs, SP_EMAX + 1 + SP_EBIAS, 16*4882a593Smuzhiyun xm >> (DP_FBITS - SP_FBITS)); 17*4882a593Smuzhiyun } 18*4882a593Smuzhiyun ieee754sp_fdp(union ieee754dp x)19*4882a593Smuzhiyununion ieee754sp ieee754sp_fdp(union ieee754dp x) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun union ieee754sp y; 22*4882a593Smuzhiyun u32 rm; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun COMPXDP; 25*4882a593Smuzhiyun COMPYSP; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun EXPLODEXDP; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun ieee754_clearcx(); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun FLUSHXDP; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun switch (xc) { 34*4882a593Smuzhiyun case IEEE754_CLASS_SNAN: 35*4882a593Smuzhiyun x = ieee754dp_nanxcpt(x); 36*4882a593Smuzhiyun EXPLODEXDP; 37*4882a593Smuzhiyun fallthrough; 38*4882a593Smuzhiyun case IEEE754_CLASS_QNAN: 39*4882a593Smuzhiyun y = ieee754sp_nan_fdp(xs, xm); 40*4882a593Smuzhiyun if (!ieee754_csr.nan2008) { 41*4882a593Smuzhiyun EXPLODEYSP; 42*4882a593Smuzhiyun if (!ieee754_class_nan(yc)) 43*4882a593Smuzhiyun y = ieee754sp_indef(); 44*4882a593Smuzhiyun } 45*4882a593Smuzhiyun return y; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun case IEEE754_CLASS_INF: 48*4882a593Smuzhiyun return ieee754sp_inf(xs); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun case IEEE754_CLASS_ZERO: 51*4882a593Smuzhiyun return ieee754sp_zero(xs); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun case IEEE754_CLASS_DNORM: 54*4882a593Smuzhiyun /* can't possibly be sp representable */ 55*4882a593Smuzhiyun ieee754_setcx(IEEE754_UNDERFLOW); 56*4882a593Smuzhiyun ieee754_setcx(IEEE754_INEXACT); 57*4882a593Smuzhiyun if ((ieee754_csr.rm == FPU_CSR_RU && !xs) || 58*4882a593Smuzhiyun (ieee754_csr.rm == FPU_CSR_RD && xs)) 59*4882a593Smuzhiyun return ieee754sp_mind(xs); 60*4882a593Smuzhiyun return ieee754sp_zero(xs); 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun case IEEE754_CLASS_NORM: 63*4882a593Smuzhiyun break; 64*4882a593Smuzhiyun } 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 67*4882a593Smuzhiyun * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift. 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) | 70*4882a593Smuzhiyun ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun return ieee754sp_format(xs, xe, rm); 73*4882a593Smuzhiyun } 74