xref: /OK3568_Linux_fs/kernel/arch/mips/math-emu/dsemul.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun #include <linux/err.h>
3*4882a593Smuzhiyun #include <linux/slab.h>
4*4882a593Smuzhiyun #include <linux/mm_types.h>
5*4882a593Smuzhiyun #include <linux/sched/task.h>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <asm/branch.h>
8*4882a593Smuzhiyun #include <asm/cacheflush.h>
9*4882a593Smuzhiyun #include <asm/fpu_emulator.h>
10*4882a593Smuzhiyun #include <asm/inst.h>
11*4882a593Smuzhiyun #include <asm/mipsregs.h>
12*4882a593Smuzhiyun #include <linux/uaccess.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /**
15*4882a593Smuzhiyun  * struct emuframe - The 'emulation' frame structure
16*4882a593Smuzhiyun  * @emul:	The instruction to 'emulate'.
17*4882a593Smuzhiyun  * @badinst:	A break instruction to cause a return to the kernel.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * This structure defines the frames placed within the delay slot emulation
20*4882a593Smuzhiyun  * page in response to a call to mips_dsemul(). Each thread may be allocated
21*4882a593Smuzhiyun  * only one frame at any given time. The kernel stores within it the
22*4882a593Smuzhiyun  * instruction to be 'emulated' followed by a break instruction, then
23*4882a593Smuzhiyun  * executes the frame in user mode. The break causes a trap to the kernel
24*4882a593Smuzhiyun  * which leads to do_dsemulret() being called unless the instruction in
25*4882a593Smuzhiyun  * @emul causes a trap itself, is a branch, or a signal is delivered to
26*4882a593Smuzhiyun  * the thread. In these cases the allocated frame will either be reused by
27*4882a593Smuzhiyun  * a subsequent delay slot 'emulation', or be freed during signal delivery or
28*4882a593Smuzhiyun  * upon thread exit.
29*4882a593Smuzhiyun  *
30*4882a593Smuzhiyun  * This approach is used because:
31*4882a593Smuzhiyun  *
32*4882a593Smuzhiyun  * - Actually emulating all instructions isn't feasible. We would need to
33*4882a593Smuzhiyun  *   be able to handle instructions from all revisions of the MIPS ISA,
34*4882a593Smuzhiyun  *   all ASEs & all vendor instruction set extensions. This would be a
35*4882a593Smuzhiyun  *   whole lot of work & continual maintenance burden as new instructions
36*4882a593Smuzhiyun  *   are introduced, and in the case of some vendor extensions may not
37*4882a593Smuzhiyun  *   even be possible. Thus we need to take the approach of actually
38*4882a593Smuzhiyun  *   executing the instruction.
39*4882a593Smuzhiyun  *
40*4882a593Smuzhiyun  * - We must execute the instruction within user context. If we were to
41*4882a593Smuzhiyun  *   execute the instruction in kernel mode then it would have access to
42*4882a593Smuzhiyun  *   kernel resources without very careful checks, leaving us with a
43*4882a593Smuzhiyun  *   high potential for security or stability issues to arise.
44*4882a593Smuzhiyun  *
45*4882a593Smuzhiyun  * - We used to place the frame on the users stack, but this requires
46*4882a593Smuzhiyun  *   that the stack be executable. This is bad for security so the
47*4882a593Smuzhiyun  *   per-process page is now used instead.
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  * - The instruction in @emul may be something entirely invalid for a
50*4882a593Smuzhiyun  *   delay slot. The user may (intentionally or otherwise) place a branch
51*4882a593Smuzhiyun  *   in a delay slot, or a kernel mode instruction, or something else
52*4882a593Smuzhiyun  *   which generates an exception. Thus we can't rely upon the break in
53*4882a593Smuzhiyun  *   @badinst always being hit. For this reason we track the index of the
54*4882a593Smuzhiyun  *   frame allocated to each thread, allowing us to clean it up at later
55*4882a593Smuzhiyun  *   points such as signal delivery or thread exit.
56*4882a593Smuzhiyun  *
57*4882a593Smuzhiyun  * - The user may generate a fake struct emuframe if they wish, invoking
58*4882a593Smuzhiyun  *   the BRK_MEMU break instruction themselves. We must therefore not
59*4882a593Smuzhiyun  *   trust that BRK_MEMU means there's actually a valid frame allocated
60*4882a593Smuzhiyun  *   to the thread, and must not allow the user to do anything they
61*4882a593Smuzhiyun  *   couldn't already.
62*4882a593Smuzhiyun  */
63*4882a593Smuzhiyun struct emuframe {
64*4882a593Smuzhiyun 	mips_instruction	emul;
65*4882a593Smuzhiyun 	mips_instruction	badinst;
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static const int emupage_frame_count = PAGE_SIZE / sizeof(struct emuframe);
69*4882a593Smuzhiyun 
dsemul_page(void)70*4882a593Smuzhiyun static inline __user struct emuframe *dsemul_page(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	return (__user struct emuframe *)STACK_TOP;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
alloc_emuframe(void)75*4882a593Smuzhiyun static int alloc_emuframe(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	mm_context_t *mm_ctx = &current->mm->context;
78*4882a593Smuzhiyun 	int idx;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun retry:
81*4882a593Smuzhiyun 	spin_lock(&mm_ctx->bd_emupage_lock);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/* Ensure we have an allocation bitmap */
84*4882a593Smuzhiyun 	if (!mm_ctx->bd_emupage_allocmap) {
85*4882a593Smuzhiyun 		mm_ctx->bd_emupage_allocmap =
86*4882a593Smuzhiyun 			kcalloc(BITS_TO_LONGS(emupage_frame_count),
87*4882a593Smuzhiyun 					      sizeof(unsigned long),
88*4882a593Smuzhiyun 				GFP_ATOMIC);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 		if (!mm_ctx->bd_emupage_allocmap) {
91*4882a593Smuzhiyun 			idx = BD_EMUFRAME_NONE;
92*4882a593Smuzhiyun 			goto out_unlock;
93*4882a593Smuzhiyun 		}
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	/* Attempt to allocate a single bit/frame */
97*4882a593Smuzhiyun 	idx = bitmap_find_free_region(mm_ctx->bd_emupage_allocmap,
98*4882a593Smuzhiyun 				      emupage_frame_count, 0);
99*4882a593Smuzhiyun 	if (idx < 0) {
100*4882a593Smuzhiyun 		/*
101*4882a593Smuzhiyun 		 * Failed to allocate a frame. We'll wait until one becomes
102*4882a593Smuzhiyun 		 * available. We unlock the page so that other threads actually
103*4882a593Smuzhiyun 		 * get the opportunity to free their frames, which means
104*4882a593Smuzhiyun 		 * technically the result of bitmap_full may be incorrect.
105*4882a593Smuzhiyun 		 * However the worst case is that we repeat all this and end up
106*4882a593Smuzhiyun 		 * back here again.
107*4882a593Smuzhiyun 		 */
108*4882a593Smuzhiyun 		spin_unlock(&mm_ctx->bd_emupage_lock);
109*4882a593Smuzhiyun 		if (!wait_event_killable(mm_ctx->bd_emupage_queue,
110*4882a593Smuzhiyun 			!bitmap_full(mm_ctx->bd_emupage_allocmap,
111*4882a593Smuzhiyun 				     emupage_frame_count)))
112*4882a593Smuzhiyun 			goto retry;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 		/* Received a fatal signal - just give in */
115*4882a593Smuzhiyun 		return BD_EMUFRAME_NONE;
116*4882a593Smuzhiyun 	}
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	/* Success! */
119*4882a593Smuzhiyun 	pr_debug("allocate emuframe %d to %d\n", idx, current->pid);
120*4882a593Smuzhiyun out_unlock:
121*4882a593Smuzhiyun 	spin_unlock(&mm_ctx->bd_emupage_lock);
122*4882a593Smuzhiyun 	return idx;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
free_emuframe(int idx,struct mm_struct * mm)125*4882a593Smuzhiyun static void free_emuframe(int idx, struct mm_struct *mm)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	mm_context_t *mm_ctx = &mm->context;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	spin_lock(&mm_ctx->bd_emupage_lock);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	pr_debug("free emuframe %d from %d\n", idx, current->pid);
132*4882a593Smuzhiyun 	bitmap_clear(mm_ctx->bd_emupage_allocmap, idx, 1);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	/* If some thread is waiting for a frame, now's its chance */
135*4882a593Smuzhiyun 	wake_up(&mm_ctx->bd_emupage_queue);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	spin_unlock(&mm_ctx->bd_emupage_lock);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
within_emuframe(struct pt_regs * regs)140*4882a593Smuzhiyun static bool within_emuframe(struct pt_regs *regs)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	unsigned long base = (unsigned long)dsemul_page();
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if (regs->cp0_epc < base)
145*4882a593Smuzhiyun 		return false;
146*4882a593Smuzhiyun 	if (regs->cp0_epc >= (base + PAGE_SIZE))
147*4882a593Smuzhiyun 		return false;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return true;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
dsemul_thread_cleanup(struct task_struct * tsk)152*4882a593Smuzhiyun bool dsemul_thread_cleanup(struct task_struct *tsk)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	int fr_idx;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* Clear any allocated frame, retrieving its index */
157*4882a593Smuzhiyun 	fr_idx = atomic_xchg(&tsk->thread.bd_emu_frame, BD_EMUFRAME_NONE);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	/* If no frame was allocated, we're done */
160*4882a593Smuzhiyun 	if (fr_idx == BD_EMUFRAME_NONE)
161*4882a593Smuzhiyun 		return false;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	task_lock(tsk);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* Free the frame that this thread had allocated */
166*4882a593Smuzhiyun 	if (tsk->mm)
167*4882a593Smuzhiyun 		free_emuframe(fr_idx, tsk->mm);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	task_unlock(tsk);
170*4882a593Smuzhiyun 	return true;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
dsemul_thread_rollback(struct pt_regs * regs)173*4882a593Smuzhiyun bool dsemul_thread_rollback(struct pt_regs *regs)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct emuframe __user *fr;
176*4882a593Smuzhiyun 	int fr_idx;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/* Do nothing if we're not executing from a frame */
179*4882a593Smuzhiyun 	if (!within_emuframe(regs))
180*4882a593Smuzhiyun 		return false;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/* Find the frame being executed */
183*4882a593Smuzhiyun 	fr_idx = atomic_read(&current->thread.bd_emu_frame);
184*4882a593Smuzhiyun 	if (fr_idx == BD_EMUFRAME_NONE)
185*4882a593Smuzhiyun 		return false;
186*4882a593Smuzhiyun 	fr = &dsemul_page()[fr_idx];
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/*
189*4882a593Smuzhiyun 	 * If the PC is at the emul instruction, roll back to the branch. If
190*4882a593Smuzhiyun 	 * PC is at the badinst (break) instruction, we've already emulated the
191*4882a593Smuzhiyun 	 * instruction so progress to the continue PC. If it's anything else
192*4882a593Smuzhiyun 	 * then something is amiss & the user has branched into some other area
193*4882a593Smuzhiyun 	 * of the emupage - we'll free the allocated frame anyway.
194*4882a593Smuzhiyun 	 */
195*4882a593Smuzhiyun 	if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->emul)
196*4882a593Smuzhiyun 		regs->cp0_epc = current->thread.bd_emu_branch_pc;
197*4882a593Smuzhiyun 	else if (msk_isa16_mode(regs->cp0_epc) == (unsigned long)&fr->badinst)
198*4882a593Smuzhiyun 		regs->cp0_epc = current->thread.bd_emu_cont_pc;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
201*4882a593Smuzhiyun 	free_emuframe(fr_idx, current->mm);
202*4882a593Smuzhiyun 	return true;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
dsemul_mm_cleanup(struct mm_struct * mm)205*4882a593Smuzhiyun void dsemul_mm_cleanup(struct mm_struct *mm)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	mm_context_t *mm_ctx = &mm->context;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	kfree(mm_ctx->bd_emupage_allocmap);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
mips_dsemul(struct pt_regs * regs,mips_instruction ir,unsigned long branch_pc,unsigned long cont_pc)212*4882a593Smuzhiyun int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
213*4882a593Smuzhiyun 		unsigned long branch_pc, unsigned long cont_pc)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	int isa16 = get_isa16_mode(regs->cp0_epc);
216*4882a593Smuzhiyun 	mips_instruction break_math;
217*4882a593Smuzhiyun 	unsigned long fr_uaddr;
218*4882a593Smuzhiyun 	struct emuframe fr;
219*4882a593Smuzhiyun 	int fr_idx, ret;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	/* NOP is easy */
222*4882a593Smuzhiyun 	if (ir == 0)
223*4882a593Smuzhiyun 		return -1;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* microMIPS instructions */
226*4882a593Smuzhiyun 	if (isa16) {
227*4882a593Smuzhiyun 		union mips_instruction insn = { .word = ir };
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 		/* NOP16 aka MOVE16 $0, $0 */
230*4882a593Smuzhiyun 		if ((ir >> 16) == MM_NOP16)
231*4882a593Smuzhiyun 			return -1;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 		/* ADDIUPC */
234*4882a593Smuzhiyun 		if (insn.mm_a_format.opcode == mm_addiupc_op) {
235*4882a593Smuzhiyun 			unsigned int rs;
236*4882a593Smuzhiyun 			s32 v;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 			rs = (((insn.mm_a_format.rs + 0xe) & 0xf) + 2);
239*4882a593Smuzhiyun 			v = regs->cp0_epc & ~3;
240*4882a593Smuzhiyun 			v += insn.mm_a_format.simmediate << 2;
241*4882a593Smuzhiyun 			regs->regs[rs] = (long)v;
242*4882a593Smuzhiyun 			return -1;
243*4882a593Smuzhiyun 		}
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	pr_debug("dsemul 0x%08lx cont at 0x%08lx\n", regs->cp0_epc, cont_pc);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	/* Allocate a frame if we don't already have one */
249*4882a593Smuzhiyun 	fr_idx = atomic_read(&current->thread.bd_emu_frame);
250*4882a593Smuzhiyun 	if (fr_idx == BD_EMUFRAME_NONE)
251*4882a593Smuzhiyun 		fr_idx = alloc_emuframe();
252*4882a593Smuzhiyun 	if (fr_idx == BD_EMUFRAME_NONE)
253*4882a593Smuzhiyun 		return SIGBUS;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	/* Retrieve the appropriately encoded break instruction */
256*4882a593Smuzhiyun 	break_math = BREAK_MATH(isa16);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	/* Write the instructions to the frame */
259*4882a593Smuzhiyun 	if (isa16) {
260*4882a593Smuzhiyun 		union mips_instruction _emul = {
261*4882a593Smuzhiyun 			.halfword = { ir >> 16, ir }
262*4882a593Smuzhiyun 		};
263*4882a593Smuzhiyun 		union mips_instruction _badinst = {
264*4882a593Smuzhiyun 			.halfword = { break_math >> 16, break_math }
265*4882a593Smuzhiyun 		};
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 		fr.emul = _emul.word;
268*4882a593Smuzhiyun 		fr.badinst = _badinst.word;
269*4882a593Smuzhiyun 	} else {
270*4882a593Smuzhiyun 		fr.emul = ir;
271*4882a593Smuzhiyun 		fr.badinst = break_math;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	/* Write the frame to user memory */
275*4882a593Smuzhiyun 	fr_uaddr = (unsigned long)&dsemul_page()[fr_idx];
276*4882a593Smuzhiyun 	ret = access_process_vm(current, fr_uaddr, &fr, sizeof(fr),
277*4882a593Smuzhiyun 				FOLL_FORCE | FOLL_WRITE);
278*4882a593Smuzhiyun 	if (unlikely(ret != sizeof(fr))) {
279*4882a593Smuzhiyun 		MIPS_FPU_EMU_INC_STATS(errors);
280*4882a593Smuzhiyun 		free_emuframe(fr_idx, current->mm);
281*4882a593Smuzhiyun 		return SIGBUS;
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	/* Record the PC of the branch, PC to continue from & frame index */
285*4882a593Smuzhiyun 	current->thread.bd_emu_branch_pc = branch_pc;
286*4882a593Smuzhiyun 	current->thread.bd_emu_cont_pc = cont_pc;
287*4882a593Smuzhiyun 	atomic_set(&current->thread.bd_emu_frame, fr_idx);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	/* Change user register context to execute the frame */
290*4882a593Smuzhiyun 	regs->cp0_epc = fr_uaddr | isa16;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	return 0;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun 
do_dsemulret(struct pt_regs * xcp)295*4882a593Smuzhiyun bool do_dsemulret(struct pt_regs *xcp)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun 	/* Cleanup the allocated frame, returning if there wasn't one */
298*4882a593Smuzhiyun 	if (!dsemul_thread_cleanup(current)) {
299*4882a593Smuzhiyun 		MIPS_FPU_EMU_INC_STATS(errors);
300*4882a593Smuzhiyun 		return false;
301*4882a593Smuzhiyun 	}
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	/* Set EPC to return to post-branch instruction */
304*4882a593Smuzhiyun 	xcp->cp0_epc = current->thread.bd_emu_cont_pc;
305*4882a593Smuzhiyun 	pr_debug("dsemulret to 0x%08lx\n", xcp->cp0_epc);
306*4882a593Smuzhiyun 	MIPS_FPU_EMU_INC_STATS(ds_emul);
307*4882a593Smuzhiyun 	return true;
308*4882a593Smuzhiyun }
309