xref: /OK3568_Linux_fs/kernel/arch/mips/loongson64/cop2-ex.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun  * for more details.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2014 Lemote Corporation.
7*4882a593Smuzhiyun  *   written by Huacai Chen <chenhc@lemote.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * based on arch/mips/cavium-octeon/cpu.c
10*4882a593Smuzhiyun  * Copyright (C) 2009 Wind River Systems,
11*4882a593Smuzhiyun  *   written by Ralf Baechle <ralf@linux-mips.org>
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/sched.h>
15*4882a593Smuzhiyun #include <linux/notifier.h>
16*4882a593Smuzhiyun #include <linux/ptrace.h>
17*4882a593Smuzhiyun #include <linux/uaccess.h>
18*4882a593Smuzhiyun #include <linux/sched/signal.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <asm/fpu.h>
21*4882a593Smuzhiyun #include <asm/cop2.h>
22*4882a593Smuzhiyun #include <asm/inst.h>
23*4882a593Smuzhiyun #include <asm/branch.h>
24*4882a593Smuzhiyun #include <asm/current.h>
25*4882a593Smuzhiyun #include <asm/mipsregs.h>
26*4882a593Smuzhiyun #include <asm/unaligned-emul.h>
27*4882a593Smuzhiyun 
loongson_cu2_call(struct notifier_block * nfb,unsigned long action,void * data)28*4882a593Smuzhiyun static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
29*4882a593Smuzhiyun 	void *data)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	unsigned int res, fpu_owned;
32*4882a593Smuzhiyun 	unsigned long ra, value, value_next;
33*4882a593Smuzhiyun 	union mips_instruction insn;
34*4882a593Smuzhiyun 	int fr = !test_thread_flag(TIF_32BIT_FPREGS);
35*4882a593Smuzhiyun 	struct pt_regs *regs = (struct pt_regs *)data;
36*4882a593Smuzhiyun 	void __user *addr = (void __user *)regs->cp0_badvaddr;
37*4882a593Smuzhiyun 	unsigned int __user *pc = (unsigned int __user *)exception_epc(regs);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	ra = regs->regs[31];
40*4882a593Smuzhiyun 	__get_user(insn.word, pc);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	switch (action) {
43*4882a593Smuzhiyun 	case CU2_EXCEPTION:
44*4882a593Smuzhiyun 		preempt_disable();
45*4882a593Smuzhiyun 		fpu_owned = __is_fpu_owner();
46*4882a593Smuzhiyun 		if (!fr)
47*4882a593Smuzhiyun 			set_c0_status(ST0_CU1 | ST0_CU2);
48*4882a593Smuzhiyun 		else
49*4882a593Smuzhiyun 			set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR);
50*4882a593Smuzhiyun 		enable_fpu_hazard();
51*4882a593Smuzhiyun 		KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2);
52*4882a593Smuzhiyun 		if (fr)
53*4882a593Smuzhiyun 			KSTK_STATUS(current) |= ST0_FR;
54*4882a593Smuzhiyun 		else
55*4882a593Smuzhiyun 			KSTK_STATUS(current) &= ~ST0_FR;
56*4882a593Smuzhiyun 		/* If FPU is owned, we needn't init or restore fp */
57*4882a593Smuzhiyun 		if (!fpu_owned) {
58*4882a593Smuzhiyun 			set_thread_flag(TIF_USEDFPU);
59*4882a593Smuzhiyun 			init_fp_ctx(current);
60*4882a593Smuzhiyun 			_restore_fp(current);
61*4882a593Smuzhiyun 		}
62*4882a593Smuzhiyun 		preempt_enable();
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	case CU2_LWC2_OP:
67*4882a593Smuzhiyun 		if (insn.loongson3_lswc2_format.ls == 0)
68*4882a593Smuzhiyun 			goto sigbus;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 		if (insn.loongson3_lswc2_format.fr == 0) {	/* gslq */
71*4882a593Smuzhiyun 			if (!access_ok(addr, 16))
72*4882a593Smuzhiyun 				goto sigbus;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 			LoadDW(addr, value, res);
75*4882a593Smuzhiyun 			if (res)
76*4882a593Smuzhiyun 				goto fault;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 			LoadDW(addr + 8, value_next, res);
79*4882a593Smuzhiyun 			if (res)
80*4882a593Smuzhiyun 				goto fault;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 			regs->regs[insn.loongson3_lswc2_format.rt] = value;
83*4882a593Smuzhiyun 			regs->regs[insn.loongson3_lswc2_format.rq] = value_next;
84*4882a593Smuzhiyun 			compute_return_epc(regs);
85*4882a593Smuzhiyun 		} else {					/* gslqc1 */
86*4882a593Smuzhiyun 			if (!access_ok(addr, 16))
87*4882a593Smuzhiyun 				goto sigbus;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 			lose_fpu(1);
90*4882a593Smuzhiyun 			LoadDW(addr, value, res);
91*4882a593Smuzhiyun 			if (res)
92*4882a593Smuzhiyun 				goto fault;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 			LoadDW(addr + 8, value_next, res);
95*4882a593Smuzhiyun 			if (res)
96*4882a593Smuzhiyun 				goto fault;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 			set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value);
99*4882a593Smuzhiyun 			set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next);
100*4882a593Smuzhiyun 			compute_return_epc(regs);
101*4882a593Smuzhiyun 			own_fpu(1);
102*4882a593Smuzhiyun 		}
103*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	case CU2_SWC2_OP:
106*4882a593Smuzhiyun 		if (insn.loongson3_lswc2_format.ls == 0)
107*4882a593Smuzhiyun 			goto sigbus;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 		if (insn.loongson3_lswc2_format.fr == 0) {	/* gssq */
110*4882a593Smuzhiyun 			if (!access_ok(addr, 16))
111*4882a593Smuzhiyun 				goto sigbus;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 			/* write upper 8 bytes first */
114*4882a593Smuzhiyun 			value_next = regs->regs[insn.loongson3_lswc2_format.rq];
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 			StoreDW(addr + 8, value_next, res);
117*4882a593Smuzhiyun 			if (res)
118*4882a593Smuzhiyun 				goto fault;
119*4882a593Smuzhiyun 			value = regs->regs[insn.loongson3_lswc2_format.rt];
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 			StoreDW(addr, value, res);
122*4882a593Smuzhiyun 			if (res)
123*4882a593Smuzhiyun 				goto fault;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 			compute_return_epc(regs);
126*4882a593Smuzhiyun 		} else {					/* gssqc1 */
127*4882a593Smuzhiyun 			if (!access_ok(addr, 16))
128*4882a593Smuzhiyun 				goto sigbus;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 			lose_fpu(1);
131*4882a593Smuzhiyun 			value_next = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 			StoreDW(addr + 8, value_next, res);
134*4882a593Smuzhiyun 			if (res)
135*4882a593Smuzhiyun 				goto fault;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 			value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 			StoreDW(addr, value, res);
140*4882a593Smuzhiyun 			if (res)
141*4882a593Smuzhiyun 				goto fault;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 			compute_return_epc(regs);
144*4882a593Smuzhiyun 			own_fpu(1);
145*4882a593Smuzhiyun 		}
146*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	case CU2_LDC2_OP:
149*4882a593Smuzhiyun 		switch (insn.loongson3_lsdc2_format.opcode1) {
150*4882a593Smuzhiyun 		/*
151*4882a593Smuzhiyun 		 * Loongson-3 overridden ldc2 instructions.
152*4882a593Smuzhiyun 		 * opcode1              instruction
153*4882a593Smuzhiyun 		 *   0x1          gslhx: load 2 bytes to GPR
154*4882a593Smuzhiyun 		 *   0x2          gslwx: load 4 bytes to GPR
155*4882a593Smuzhiyun 		 *   0x3          gsldx: load 8 bytes to GPR
156*4882a593Smuzhiyun 		 *   0x6	  gslwxc1: load 4 bytes to FPR
157*4882a593Smuzhiyun 		 *   0x7	  gsldxc1: load 8 bytes to FPR
158*4882a593Smuzhiyun 		 */
159*4882a593Smuzhiyun 		case 0x1:
160*4882a593Smuzhiyun 			if (!access_ok(addr, 2))
161*4882a593Smuzhiyun 				goto sigbus;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 			LoadHW(addr, value, res);
164*4882a593Smuzhiyun 			if (res)
165*4882a593Smuzhiyun 				goto fault;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 			compute_return_epc(regs);
168*4882a593Smuzhiyun 			regs->regs[insn.loongson3_lsdc2_format.rt] = value;
169*4882a593Smuzhiyun 			break;
170*4882a593Smuzhiyun 		case 0x2:
171*4882a593Smuzhiyun 			if (!access_ok(addr, 4))
172*4882a593Smuzhiyun 				goto sigbus;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 			LoadW(addr, value, res);
175*4882a593Smuzhiyun 			if (res)
176*4882a593Smuzhiyun 				goto fault;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 			compute_return_epc(regs);
179*4882a593Smuzhiyun 			regs->regs[insn.loongson3_lsdc2_format.rt] = value;
180*4882a593Smuzhiyun 			break;
181*4882a593Smuzhiyun 		case 0x3:
182*4882a593Smuzhiyun 			if (!access_ok(addr, 8))
183*4882a593Smuzhiyun 				goto sigbus;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 			LoadDW(addr, value, res);
186*4882a593Smuzhiyun 			if (res)
187*4882a593Smuzhiyun 				goto fault;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 			compute_return_epc(regs);
190*4882a593Smuzhiyun 			regs->regs[insn.loongson3_lsdc2_format.rt] = value;
191*4882a593Smuzhiyun 			break;
192*4882a593Smuzhiyun 		case 0x6:
193*4882a593Smuzhiyun 			die_if_kernel("Unaligned FP access in kernel code", regs);
194*4882a593Smuzhiyun 			BUG_ON(!used_math());
195*4882a593Smuzhiyun 			if (!access_ok(addr, 4))
196*4882a593Smuzhiyun 				goto sigbus;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 			lose_fpu(1);
199*4882a593Smuzhiyun 			LoadW(addr, value, res);
200*4882a593Smuzhiyun 			if (res)
201*4882a593Smuzhiyun 				goto fault;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 			set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
204*4882a593Smuzhiyun 			compute_return_epc(regs);
205*4882a593Smuzhiyun 			own_fpu(1);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 			break;
208*4882a593Smuzhiyun 		case 0x7:
209*4882a593Smuzhiyun 			die_if_kernel("Unaligned FP access in kernel code", regs);
210*4882a593Smuzhiyun 			BUG_ON(!used_math());
211*4882a593Smuzhiyun 			if (!access_ok(addr, 8))
212*4882a593Smuzhiyun 				goto sigbus;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 			lose_fpu(1);
215*4882a593Smuzhiyun 			LoadDW(addr, value, res);
216*4882a593Smuzhiyun 			if (res)
217*4882a593Smuzhiyun 				goto fault;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 			set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
220*4882a593Smuzhiyun 			compute_return_epc(regs);
221*4882a593Smuzhiyun 			own_fpu(1);
222*4882a593Smuzhiyun 			break;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 		}
225*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	case CU2_SDC2_OP:
228*4882a593Smuzhiyun 		switch (insn.loongson3_lsdc2_format.opcode1) {
229*4882a593Smuzhiyun 		/*
230*4882a593Smuzhiyun 		 * Loongson-3 overridden sdc2 instructions.
231*4882a593Smuzhiyun 		 * opcode1              instruction
232*4882a593Smuzhiyun 		 *   0x1          gsshx: store 2 bytes from GPR
233*4882a593Smuzhiyun 		 *   0x2          gsswx: store 4 bytes from GPR
234*4882a593Smuzhiyun 		 *   0x3          gssdx: store 8 bytes from GPR
235*4882a593Smuzhiyun 		 *   0x6          gsswxc1: store 4 bytes from FPR
236*4882a593Smuzhiyun 		 *   0x7          gssdxc1: store 8 bytes from FPR
237*4882a593Smuzhiyun 		 */
238*4882a593Smuzhiyun 		case 0x1:
239*4882a593Smuzhiyun 			if (!access_ok(addr, 2))
240*4882a593Smuzhiyun 				goto sigbus;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 			compute_return_epc(regs);
243*4882a593Smuzhiyun 			value = regs->regs[insn.loongson3_lsdc2_format.rt];
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 			StoreHW(addr, value, res);
246*4882a593Smuzhiyun 			if (res)
247*4882a593Smuzhiyun 				goto fault;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 			break;
250*4882a593Smuzhiyun 		case 0x2:
251*4882a593Smuzhiyun 			if (!access_ok(addr, 4))
252*4882a593Smuzhiyun 				goto sigbus;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 			compute_return_epc(regs);
255*4882a593Smuzhiyun 			value = regs->regs[insn.loongson3_lsdc2_format.rt];
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 			StoreW(addr, value, res);
258*4882a593Smuzhiyun 			if (res)
259*4882a593Smuzhiyun 				goto fault;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 			break;
262*4882a593Smuzhiyun 		case 0x3:
263*4882a593Smuzhiyun 			if (!access_ok(addr, 8))
264*4882a593Smuzhiyun 				goto sigbus;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 			compute_return_epc(regs);
267*4882a593Smuzhiyun 			value = regs->regs[insn.loongson3_lsdc2_format.rt];
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 			StoreDW(addr, value, res);
270*4882a593Smuzhiyun 			if (res)
271*4882a593Smuzhiyun 				goto fault;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 			break;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 		case 0x6:
276*4882a593Smuzhiyun 			die_if_kernel("Unaligned FP access in kernel code", regs);
277*4882a593Smuzhiyun 			BUG_ON(!used_math());
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 			if (!access_ok(addr, 4))
280*4882a593Smuzhiyun 				goto sigbus;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 			lose_fpu(1);
283*4882a593Smuzhiyun 			value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 			StoreW(addr, value, res);
286*4882a593Smuzhiyun 			if (res)
287*4882a593Smuzhiyun 				goto fault;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 			compute_return_epc(regs);
290*4882a593Smuzhiyun 			own_fpu(1);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 			break;
293*4882a593Smuzhiyun 		case 0x7:
294*4882a593Smuzhiyun 			die_if_kernel("Unaligned FP access in kernel code", regs);
295*4882a593Smuzhiyun 			BUG_ON(!used_math());
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 			if (!access_ok(addr, 8))
298*4882a593Smuzhiyun 				goto sigbus;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 			lose_fpu(1);
301*4882a593Smuzhiyun 			value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 			StoreDW(addr, value, res);
304*4882a593Smuzhiyun 			if (res)
305*4882a593Smuzhiyun 				goto fault;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 			compute_return_epc(regs);
308*4882a593Smuzhiyun 			own_fpu(1);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 			break;
311*4882a593Smuzhiyun 		}
312*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return NOTIFY_OK;		/* Let default notifier send signals */
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun fault:
318*4882a593Smuzhiyun 	/* roll back jump/branch */
319*4882a593Smuzhiyun 	regs->regs[31] = ra;
320*4882a593Smuzhiyun 	regs->cp0_epc = (unsigned long)pc;
321*4882a593Smuzhiyun 	/* Did we have an exception handler installed? */
322*4882a593Smuzhiyun 	if (fixup_exception(regs))
323*4882a593Smuzhiyun 		return NOTIFY_STOP;	/* Don't call default notifier */
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	die_if_kernel("Unhandled kernel unaligned access", regs);
326*4882a593Smuzhiyun 	force_sig(SIGSEGV);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	return NOTIFY_STOP;	/* Don't call default notifier */
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun sigbus:
331*4882a593Smuzhiyun 	die_if_kernel("Unhandled kernel unaligned access", regs);
332*4882a593Smuzhiyun 	force_sig(SIGBUS);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return NOTIFY_STOP;	/* Don't call default notifier */
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
loongson_cu2_setup(void)337*4882a593Smuzhiyun static int __init loongson_cu2_setup(void)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	return cu2_notifier(loongson_cu2_call, 0);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun early_initcall(loongson_cu2_setup);
342