1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2009 Lemote, Inc.
9*4882a593Smuzhiyun * Author: Yan hua (yanhua@lemote.com)
10*4882a593Smuzhiyun * Author: Wu Zhangjin (wuzhangjin@gmail.com)
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/serial_8250.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/bootinfo.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <loongson.h>
20*4882a593Smuzhiyun #include <machine.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define PORT(int, clk) \
23*4882a593Smuzhiyun { \
24*4882a593Smuzhiyun .irq = int, \
25*4882a593Smuzhiyun .uartclk = clk, \
26*4882a593Smuzhiyun .iotype = UPIO_PORT, \
27*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
28*4882a593Smuzhiyun .regshift = 0, \
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define PORT_M(int, clk) \
32*4882a593Smuzhiyun { \
33*4882a593Smuzhiyun .irq = MIPS_CPU_IRQ_BASE + (int), \
34*4882a593Smuzhiyun .uartclk = clk, \
35*4882a593Smuzhiyun .iotype = UPIO_MEM, \
36*4882a593Smuzhiyun .membase = (void __iomem *)NULL, \
37*4882a593Smuzhiyun .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
38*4882a593Smuzhiyun .regshift = 0, \
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct plat_serial8250_port uart8250_data[MACH_LOONGSON_END + 1] = {
42*4882a593Smuzhiyun [MACH_LOONGSON_UNKNOWN] = {},
43*4882a593Smuzhiyun [MACH_LEMOTE_FL2E] = PORT(4, 1843200),
44*4882a593Smuzhiyun [MACH_LEMOTE_FL2F] = PORT(3, 1843200),
45*4882a593Smuzhiyun [MACH_LEMOTE_ML2F7] = PORT_M(3, 3686400),
46*4882a593Smuzhiyun [MACH_LEMOTE_YL2F89] = PORT_M(3, 3686400),
47*4882a593Smuzhiyun [MACH_DEXXON_GDIUM2F10] = PORT_M(3, 3686400),
48*4882a593Smuzhiyun [MACH_LEMOTE_NAS] = PORT_M(3, 3686400),
49*4882a593Smuzhiyun [MACH_LEMOTE_LL2F] = PORT(3, 1843200),
50*4882a593Smuzhiyun [MACH_LOONGSON_END] = {},
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static struct platform_device uart8250_device = {
54*4882a593Smuzhiyun .name = "serial8250",
55*4882a593Smuzhiyun .id = PLAT8250_DEV_PLATFORM,
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
serial_init(void)58*4882a593Smuzhiyun static int __init serial_init(void)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun unsigned char iotype;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun iotype = uart8250_data[mips_machtype].iotype;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (UPIO_MEM == iotype) {
65*4882a593Smuzhiyun uart8250_data[mips_machtype].mapbase =
66*4882a593Smuzhiyun loongson_uart_base;
67*4882a593Smuzhiyun uart8250_data[mips_machtype].membase =
68*4882a593Smuzhiyun (void __iomem *)_loongson_uart_base;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun else if (UPIO_PORT == iotype)
71*4882a593Smuzhiyun uart8250_data[mips_machtype].iobase =
72*4882a593Smuzhiyun loongson_uart_base - LOONGSON_PCIIO_BASE;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun memset(&uart8250_data[mips_machtype + 1], 0,
75*4882a593Smuzhiyun sizeof(struct plat_serial8250_port));
76*4882a593Smuzhiyun uart8250_device.dev.platform_data = &uart8250_data[mips_machtype];
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return platform_device_register(&uart8250_device);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun module_init(serial_init);
81*4882a593Smuzhiyun
serial_exit(void)82*4882a593Smuzhiyun static void __exit serial_exit(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun platform_device_unregister(&uart8250_device);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun module_exit(serial_exit);
87