1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * loongson-specific suspend support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2009 Lemote Inc.
6*4882a593Smuzhiyun * Author: Wu Zhangjin <wuzhangjin@gmail.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/suspend.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/pm.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <asm/i8259.h>
13*4882a593Smuzhiyun #include <asm/mipsregs.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <loongson.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static unsigned int __maybe_unused cached_master_mask; /* i8259A */
18*4882a593Smuzhiyun static unsigned int __maybe_unused cached_slave_mask;
19*4882a593Smuzhiyun static unsigned int __maybe_unused cached_bonito_irq_mask; /* bonito */
20*4882a593Smuzhiyun
arch_suspend_disable_irqs(void)21*4882a593Smuzhiyun void arch_suspend_disable_irqs(void)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun /* disable all mips events */
24*4882a593Smuzhiyun local_irq_disable();
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #ifdef CONFIG_I8259
27*4882a593Smuzhiyun /* disable all events of i8259A */
28*4882a593Smuzhiyun cached_slave_mask = inb(PIC_SLAVE_IMR);
29*4882a593Smuzhiyun cached_master_mask = inb(PIC_MASTER_IMR);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun outb(0xff, PIC_SLAVE_IMR);
32*4882a593Smuzhiyun inb(PIC_SLAVE_IMR);
33*4882a593Smuzhiyun outb(0xff, PIC_MASTER_IMR);
34*4882a593Smuzhiyun inb(PIC_MASTER_IMR);
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun /* disable all events of bonito */
37*4882a593Smuzhiyun cached_bonito_irq_mask = LOONGSON_INTEN;
38*4882a593Smuzhiyun LOONGSON_INTENCLR = 0xffff;
39*4882a593Smuzhiyun (void)LOONGSON_INTENCLR;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
arch_suspend_enable_irqs(void)42*4882a593Smuzhiyun void arch_suspend_enable_irqs(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun /* enable all mips events */
45*4882a593Smuzhiyun local_irq_enable();
46*4882a593Smuzhiyun #ifdef CONFIG_I8259
47*4882a593Smuzhiyun /* only enable the cached events of i8259A */
48*4882a593Smuzhiyun outb(cached_slave_mask, PIC_SLAVE_IMR);
49*4882a593Smuzhiyun outb(cached_master_mask, PIC_MASTER_IMR);
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun /* enable all cached events of bonito */
52*4882a593Smuzhiyun LOONGSON_INTENSET = cached_bonito_irq_mask;
53*4882a593Smuzhiyun (void)LOONGSON_INTENSET;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /*
57*4882a593Smuzhiyun * Setup the board-specific events for waking up loongson from wait mode
58*4882a593Smuzhiyun */
setup_wakeup_events(void)59*4882a593Smuzhiyun void __weak setup_wakeup_events(void)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * Check wakeup events
65*4882a593Smuzhiyun */
wakeup_loongson(void)66*4882a593Smuzhiyun int __weak wakeup_loongson(void)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun return 1;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun * If the events are really what we want to wakeup the CPU, wake it up
73*4882a593Smuzhiyun * otherwise put the CPU asleep again.
74*4882a593Smuzhiyun */
wait_for_wakeup_events(void)75*4882a593Smuzhiyun static void wait_for_wakeup_events(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun while (!wakeup_loongson())
78*4882a593Smuzhiyun writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /*
82*4882a593Smuzhiyun * Stop all perf counters
83*4882a593Smuzhiyun *
84*4882a593Smuzhiyun * $24 is the control register of Loongson perf counter
85*4882a593Smuzhiyun */
stop_perf_counters(void)86*4882a593Smuzhiyun static inline void stop_perf_counters(void)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun __write_64bit_c0_register($24, 0, 0);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun
loongson_suspend_enter(void)92*4882a593Smuzhiyun static void loongson_suspend_enter(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun unsigned int cached_cpu_freq;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /* setup wakeup events via enabling the IRQs */
97*4882a593Smuzhiyun setup_wakeup_events();
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun stop_perf_counters();
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun cached_cpu_freq = readl(LOONGSON_CHIPCFG);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* Put CPU into wait mode */
104*4882a593Smuzhiyun writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* wait for the given events to wakeup cpu from wait mode */
107*4882a593Smuzhiyun wait_for_wakeup_events();
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun writel(cached_cpu_freq, LOONGSON_CHIPCFG);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun mmiowb();
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
mach_suspend(void)114*4882a593Smuzhiyun void __weak mach_suspend(void)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
mach_resume(void)118*4882a593Smuzhiyun void __weak mach_resume(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
loongson_pm_enter(suspend_state_t state)122*4882a593Smuzhiyun static int loongson_pm_enter(suspend_state_t state)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun mach_suspend();
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* processor specific suspend */
127*4882a593Smuzhiyun loongson_suspend_enter();
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun mach_resume();
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
loongson_pm_valid_state(suspend_state_t state)134*4882a593Smuzhiyun static int loongson_pm_valid_state(suspend_state_t state)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun switch (state) {
137*4882a593Smuzhiyun case PM_SUSPEND_ON:
138*4882a593Smuzhiyun case PM_SUSPEND_STANDBY:
139*4882a593Smuzhiyun case PM_SUSPEND_MEM:
140*4882a593Smuzhiyun return 1;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun default:
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun static const struct platform_suspend_ops loongson_pm_ops = {
148*4882a593Smuzhiyun .valid = loongson_pm_valid_state,
149*4882a593Smuzhiyun .enter = loongson_pm_enter,
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun
loongson_pm_init(void)152*4882a593Smuzhiyun static int __init loongson_pm_init(void)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun suspend_set_ops(&loongson_pm_ops);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun arch_initcall(loongson_pm_init);
159