1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2009 Lemote Inc. 4*4882a593Smuzhiyun * Author: Wu Zhangjin, wuzhangjin@gmail.com 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <linux/memblock.h> 8*4882a593Smuzhiyun #include <asm/bootinfo.h> 9*4882a593Smuzhiyun #include <asm/traps.h> 10*4882a593Smuzhiyun #include <asm/smp-ops.h> 11*4882a593Smuzhiyun #include <asm/cacheflush.h> 12*4882a593Smuzhiyun #include <asm/fw/fw.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <loongson.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* Loongson CPU address windows config space base address */ 17*4882a593Smuzhiyun unsigned long __maybe_unused _loongson_addrwincfg_base; 18*4882a593Smuzhiyun mips_nmi_setup(void)19*4882a593Smuzhiyunstatic void __init mips_nmi_setup(void) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun void *base; 22*4882a593Smuzhiyun extern char except_vec_nmi[]; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun base = (void *)(CAC_BASE + 0x380); 25*4882a593Smuzhiyun memcpy(base, except_vec_nmi, 0x80); 26*4882a593Smuzhiyun flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); 27*4882a593Smuzhiyun } 28*4882a593Smuzhiyun prom_init(void)29*4882a593Smuzhiyunvoid __init prom_init(void) 30*4882a593Smuzhiyun { 31*4882a593Smuzhiyun #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 32*4882a593Smuzhiyun _loongson_addrwincfg_base = (unsigned long) 33*4882a593Smuzhiyun ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE); 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun fw_init_cmdline(); 37*4882a593Smuzhiyun prom_init_machtype(); 38*4882a593Smuzhiyun prom_init_env(); 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* init base address of io space */ 41*4882a593Smuzhiyun set_io_port_base((unsigned long) 42*4882a593Smuzhiyun ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); 43*4882a593Smuzhiyun prom_init_memory(); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /*init the uart base address */ 46*4882a593Smuzhiyun prom_init_uart_base(); 47*4882a593Smuzhiyun board_nmi_handler_setup = mips_nmi_setup; 48*4882a593Smuzhiyun } 49*4882a593Smuzhiyun prom_free_prom_memory(void)50*4882a593Smuzhiyunvoid __init prom_free_prom_memory(void) 51*4882a593Smuzhiyun { 52*4882a593Smuzhiyun } 53