1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
7*4882a593Smuzhiyun * Copyright (C) 1996 by Paul M. Antoine
8*4882a593Smuzhiyun * Copyright (C) 1999 Silicon Graphics
9*4882a593Smuzhiyun * Copyright (C) 2000 MIPS Technologies, Inc.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #include <asm/irqflags.h>
12*4882a593Smuzhiyun #include <asm/hazards.h>
13*4882a593Smuzhiyun #include <linux/compiler.h>
14*4882a593Smuzhiyun #include <linux/preempt.h>
15*4882a593Smuzhiyun #include <linux/export.h>
16*4882a593Smuzhiyun #include <linux/stringify.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #if !defined(CONFIG_CPU_HAS_DIEI)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * For cli() we have to insert nops to make sure that the new value
22*4882a593Smuzhiyun * has actually arrived in the status register before the end of this
23*4882a593Smuzhiyun * macro.
24*4882a593Smuzhiyun * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
25*4882a593Smuzhiyun * no nops at all.
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * For TX49, operating only IE bit is not enough.
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * If mfc0 $12 follows store and the mfc0 is last instruction of a
31*4882a593Smuzhiyun * page and fetching the next instruction causes TLB miss, the result
32*4882a593Smuzhiyun * of the mfc0 might wrongly contain EXL bit.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * Workaround: mask EXL bit of the result or place a nop before mfc0.
37*4882a593Smuzhiyun */
arch_local_irq_disable(void)38*4882a593Smuzhiyun notrace void arch_local_irq_disable(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun preempt_disable_notrace();
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun __asm__ __volatile__(
43*4882a593Smuzhiyun " .set push \n"
44*4882a593Smuzhiyun " .set noat \n"
45*4882a593Smuzhiyun " mfc0 $1,$12 \n"
46*4882a593Smuzhiyun " ori $1,0x1f \n"
47*4882a593Smuzhiyun " xori $1,0x1f \n"
48*4882a593Smuzhiyun " .set noreorder \n"
49*4882a593Smuzhiyun " mtc0 $1,$12 \n"
50*4882a593Smuzhiyun " " __stringify(__irq_disable_hazard) " \n"
51*4882a593Smuzhiyun " .set pop \n"
52*4882a593Smuzhiyun : /* no outputs */
53*4882a593Smuzhiyun : /* no inputs */
54*4882a593Smuzhiyun : "memory");
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun preempt_enable_notrace();
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun EXPORT_SYMBOL(arch_local_irq_disable);
59*4882a593Smuzhiyun
arch_local_irq_save(void)60*4882a593Smuzhiyun notrace unsigned long arch_local_irq_save(void)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun unsigned long flags;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun preempt_disable_notrace();
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun __asm__ __volatile__(
67*4882a593Smuzhiyun " .set push \n"
68*4882a593Smuzhiyun " .set reorder \n"
69*4882a593Smuzhiyun " .set noat \n"
70*4882a593Smuzhiyun " mfc0 %[flags], $12 \n"
71*4882a593Smuzhiyun " ori $1, %[flags], 0x1f \n"
72*4882a593Smuzhiyun " xori $1, 0x1f \n"
73*4882a593Smuzhiyun " .set noreorder \n"
74*4882a593Smuzhiyun " mtc0 $1, $12 \n"
75*4882a593Smuzhiyun " " __stringify(__irq_disable_hazard) " \n"
76*4882a593Smuzhiyun " .set pop \n"
77*4882a593Smuzhiyun : [flags] "=r" (flags)
78*4882a593Smuzhiyun : /* no inputs */
79*4882a593Smuzhiyun : "memory");
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun preempt_enable_notrace();
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return flags;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun EXPORT_SYMBOL(arch_local_irq_save);
86*4882a593Smuzhiyun
arch_local_irq_restore(unsigned long flags)87*4882a593Smuzhiyun notrace void arch_local_irq_restore(unsigned long flags)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun unsigned long __tmp1;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun preempt_disable_notrace();
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun __asm__ __volatile__(
94*4882a593Smuzhiyun " .set push \n"
95*4882a593Smuzhiyun " .set noreorder \n"
96*4882a593Smuzhiyun " .set noat \n"
97*4882a593Smuzhiyun " mfc0 $1, $12 \n"
98*4882a593Smuzhiyun " andi %[flags], 1 \n"
99*4882a593Smuzhiyun " ori $1, 0x1f \n"
100*4882a593Smuzhiyun " xori $1, 0x1f \n"
101*4882a593Smuzhiyun " or %[flags], $1 \n"
102*4882a593Smuzhiyun " mtc0 %[flags], $12 \n"
103*4882a593Smuzhiyun " " __stringify(__irq_disable_hazard) " \n"
104*4882a593Smuzhiyun " .set pop \n"
105*4882a593Smuzhiyun : [flags] "=r" (__tmp1)
106*4882a593Smuzhiyun : "0" (flags)
107*4882a593Smuzhiyun : "memory");
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun preempt_enable_notrace();
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun EXPORT_SYMBOL(arch_local_irq_restore);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun #endif /* !CONFIG_CPU_HAS_DIEI */
114