1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Loongson-3 Virtual IPI interrupt support.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2019 Loongson Technologies, Inc. All rights reserved.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Authors: Chen Zhu <zhuchen@loongson.cn>
8*4882a593Smuzhiyun * Authors: Huacai Chen <chenhc@lemote.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kvm_host.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define IPI_BASE 0x3ff01000ULL
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define CORE0_STATUS_OFF 0x000
16*4882a593Smuzhiyun #define CORE0_EN_OFF 0x004
17*4882a593Smuzhiyun #define CORE0_SET_OFF 0x008
18*4882a593Smuzhiyun #define CORE0_CLEAR_OFF 0x00c
19*4882a593Smuzhiyun #define CORE0_BUF_20 0x020
20*4882a593Smuzhiyun #define CORE0_BUF_28 0x028
21*4882a593Smuzhiyun #define CORE0_BUF_30 0x030
22*4882a593Smuzhiyun #define CORE0_BUF_38 0x038
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define CORE1_STATUS_OFF 0x100
25*4882a593Smuzhiyun #define CORE1_EN_OFF 0x104
26*4882a593Smuzhiyun #define CORE1_SET_OFF 0x108
27*4882a593Smuzhiyun #define CORE1_CLEAR_OFF 0x10c
28*4882a593Smuzhiyun #define CORE1_BUF_20 0x120
29*4882a593Smuzhiyun #define CORE1_BUF_28 0x128
30*4882a593Smuzhiyun #define CORE1_BUF_30 0x130
31*4882a593Smuzhiyun #define CORE1_BUF_38 0x138
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define CORE2_STATUS_OFF 0x200
34*4882a593Smuzhiyun #define CORE2_EN_OFF 0x204
35*4882a593Smuzhiyun #define CORE2_SET_OFF 0x208
36*4882a593Smuzhiyun #define CORE2_CLEAR_OFF 0x20c
37*4882a593Smuzhiyun #define CORE2_BUF_20 0x220
38*4882a593Smuzhiyun #define CORE2_BUF_28 0x228
39*4882a593Smuzhiyun #define CORE2_BUF_30 0x230
40*4882a593Smuzhiyun #define CORE2_BUF_38 0x238
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define CORE3_STATUS_OFF 0x300
43*4882a593Smuzhiyun #define CORE3_EN_OFF 0x304
44*4882a593Smuzhiyun #define CORE3_SET_OFF 0x308
45*4882a593Smuzhiyun #define CORE3_CLEAR_OFF 0x30c
46*4882a593Smuzhiyun #define CORE3_BUF_20 0x320
47*4882a593Smuzhiyun #define CORE3_BUF_28 0x328
48*4882a593Smuzhiyun #define CORE3_BUF_30 0x330
49*4882a593Smuzhiyun #define CORE3_BUF_38 0x338
50*4882a593Smuzhiyun
loongson_vipi_read(struct loongson_kvm_ipi * ipi,gpa_t addr,int len,void * val)51*4882a593Smuzhiyun static int loongson_vipi_read(struct loongson_kvm_ipi *ipi,
52*4882a593Smuzhiyun gpa_t addr, int len, void *val)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun uint32_t core = (addr >> 8) & 3;
55*4882a593Smuzhiyun uint32_t node = (addr >> 44) & 3;
56*4882a593Smuzhiyun uint32_t id = core + node * 4;
57*4882a593Smuzhiyun uint64_t offset = addr & 0xff;
58*4882a593Smuzhiyun void *pbuf;
59*4882a593Smuzhiyun struct ipi_state *s = &(ipi->ipistate[id]);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun BUG_ON(offset & (len - 1));
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun switch (offset) {
64*4882a593Smuzhiyun case CORE0_STATUS_OFF:
65*4882a593Smuzhiyun *(uint64_t *)val = s->status;
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun case CORE0_EN_OFF:
69*4882a593Smuzhiyun *(uint64_t *)val = s->en;
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun case CORE0_SET_OFF:
73*4882a593Smuzhiyun *(uint64_t *)val = 0;
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun case CORE0_CLEAR_OFF:
77*4882a593Smuzhiyun *(uint64_t *)val = 0;
78*4882a593Smuzhiyun break;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun case CORE0_BUF_20 ... CORE0_BUF_38:
81*4882a593Smuzhiyun pbuf = (void *)s->buf + (offset - 0x20);
82*4882a593Smuzhiyun if (len == 8)
83*4882a593Smuzhiyun *(uint64_t *)val = *(uint64_t *)pbuf;
84*4882a593Smuzhiyun else /* Assume len == 4 */
85*4882a593Smuzhiyun *(uint32_t *)val = *(uint32_t *)pbuf;
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun default:
89*4882a593Smuzhiyun pr_notice("%s with unknown addr %llx\n", __func__, addr);
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return 0;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
loongson_vipi_write(struct loongson_kvm_ipi * ipi,gpa_t addr,int len,const void * val)96*4882a593Smuzhiyun static int loongson_vipi_write(struct loongson_kvm_ipi *ipi,
97*4882a593Smuzhiyun gpa_t addr, int len, const void *val)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun uint32_t core = (addr >> 8) & 3;
100*4882a593Smuzhiyun uint32_t node = (addr >> 44) & 3;
101*4882a593Smuzhiyun uint32_t id = core + node * 4;
102*4882a593Smuzhiyun uint64_t data, offset = addr & 0xff;
103*4882a593Smuzhiyun void *pbuf;
104*4882a593Smuzhiyun struct kvm *kvm = ipi->kvm;
105*4882a593Smuzhiyun struct kvm_mips_interrupt irq;
106*4882a593Smuzhiyun struct ipi_state *s = &(ipi->ipistate[id]);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun data = *(uint64_t *)val;
109*4882a593Smuzhiyun BUG_ON(offset & (len - 1));
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun switch (offset) {
112*4882a593Smuzhiyun case CORE0_STATUS_OFF:
113*4882a593Smuzhiyun break;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun case CORE0_EN_OFF:
116*4882a593Smuzhiyun s->en = data;
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun case CORE0_SET_OFF:
120*4882a593Smuzhiyun s->status |= data;
121*4882a593Smuzhiyun irq.cpu = id;
122*4882a593Smuzhiyun irq.irq = 6;
123*4882a593Smuzhiyun kvm_vcpu_ioctl_interrupt(kvm->vcpus[id], &irq);
124*4882a593Smuzhiyun break;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun case CORE0_CLEAR_OFF:
127*4882a593Smuzhiyun s->status &= ~data;
128*4882a593Smuzhiyun if (!s->status) {
129*4882a593Smuzhiyun irq.cpu = id;
130*4882a593Smuzhiyun irq.irq = -6;
131*4882a593Smuzhiyun kvm_vcpu_ioctl_interrupt(kvm->vcpus[id], &irq);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun break;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun case CORE0_BUF_20 ... CORE0_BUF_38:
136*4882a593Smuzhiyun pbuf = (void *)s->buf + (offset - 0x20);
137*4882a593Smuzhiyun if (len == 8)
138*4882a593Smuzhiyun *(uint64_t *)pbuf = (uint64_t)data;
139*4882a593Smuzhiyun else /* Assume len == 4 */
140*4882a593Smuzhiyun *(uint32_t *)pbuf = (uint32_t)data;
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun default:
144*4882a593Smuzhiyun pr_notice("%s with unknown addr %llx\n", __func__, addr);
145*4882a593Smuzhiyun break;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun return 0;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
kvm_ipi_read(struct kvm_vcpu * vcpu,struct kvm_io_device * dev,gpa_t addr,int len,void * val)151*4882a593Smuzhiyun static int kvm_ipi_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
152*4882a593Smuzhiyun gpa_t addr, int len, void *val)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun unsigned long flags;
155*4882a593Smuzhiyun struct loongson_kvm_ipi *ipi;
156*4882a593Smuzhiyun struct ipi_io_device *ipi_device;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun ipi_device = container_of(dev, struct ipi_io_device, device);
159*4882a593Smuzhiyun ipi = ipi_device->ipi;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun spin_lock_irqsave(&ipi->lock, flags);
162*4882a593Smuzhiyun loongson_vipi_read(ipi, addr, len, val);
163*4882a593Smuzhiyun spin_unlock_irqrestore(&ipi->lock, flags);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
kvm_ipi_write(struct kvm_vcpu * vcpu,struct kvm_io_device * dev,gpa_t addr,int len,const void * val)168*4882a593Smuzhiyun static int kvm_ipi_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
169*4882a593Smuzhiyun gpa_t addr, int len, const void *val)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun unsigned long flags;
172*4882a593Smuzhiyun struct loongson_kvm_ipi *ipi;
173*4882a593Smuzhiyun struct ipi_io_device *ipi_device;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun ipi_device = container_of(dev, struct ipi_io_device, device);
176*4882a593Smuzhiyun ipi = ipi_device->ipi;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun spin_lock_irqsave(&ipi->lock, flags);
179*4882a593Smuzhiyun loongson_vipi_write(ipi, addr, len, val);
180*4882a593Smuzhiyun spin_unlock_irqrestore(&ipi->lock, flags);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun static const struct kvm_io_device_ops kvm_ipi_ops = {
186*4882a593Smuzhiyun .read = kvm_ipi_read,
187*4882a593Smuzhiyun .write = kvm_ipi_write,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
kvm_init_loongson_ipi(struct kvm * kvm)190*4882a593Smuzhiyun void kvm_init_loongson_ipi(struct kvm *kvm)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun int i;
193*4882a593Smuzhiyun unsigned long addr;
194*4882a593Smuzhiyun struct loongson_kvm_ipi *s;
195*4882a593Smuzhiyun struct kvm_io_device *device;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun s = &kvm->arch.ipi;
198*4882a593Smuzhiyun s->kvm = kvm;
199*4882a593Smuzhiyun spin_lock_init(&s->lock);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun * Initialize IPI device
203*4882a593Smuzhiyun */
204*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
205*4882a593Smuzhiyun device = &s->dev_ipi[i].device;
206*4882a593Smuzhiyun kvm_iodevice_init(device, &kvm_ipi_ops);
207*4882a593Smuzhiyun addr = (((unsigned long)i) << 44) + IPI_BASE;
208*4882a593Smuzhiyun mutex_lock(&kvm->slots_lock);
209*4882a593Smuzhiyun kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, addr, 0x400, device);
210*4882a593Smuzhiyun mutex_unlock(&kvm->slots_lock);
211*4882a593Smuzhiyun s->dev_ipi[i].ipi = s;
212*4882a593Smuzhiyun s->dev_ipi[i].node_id = i;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun }
215