1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 4*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 5*4882a593Smuzhiyun * for more details. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 1996, 99, 2003 by Ralf Baechle 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef _ASM_SWAB_H 10*4882a593Smuzhiyun #define _ASM_SWAB_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/compiler.h> 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define __SWAB_64_THRU_32__ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #if !defined(__mips16) && \ 18*4882a593Smuzhiyun ((defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \ 19*4882a593Smuzhiyun defined(_MIPS_ARCH_LOONGSON3A)) 20*4882a593Smuzhiyun __arch_swab16(__u16 x)21*4882a593Smuzhiyunstatic inline __attribute_const__ __u16 __arch_swab16(__u16 x) 22*4882a593Smuzhiyun { 23*4882a593Smuzhiyun __asm__( 24*4882a593Smuzhiyun " .set push \n" 25*4882a593Smuzhiyun " .set arch=mips32r2 \n" 26*4882a593Smuzhiyun " wsbh %0, %1 \n" 27*4882a593Smuzhiyun " .set pop \n" 28*4882a593Smuzhiyun : "=r" (x) 29*4882a593Smuzhiyun : "r" (x)); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun return x; 32*4882a593Smuzhiyun } 33*4882a593Smuzhiyun #define __arch_swab16 __arch_swab16 34*4882a593Smuzhiyun __arch_swab32(__u32 x)35*4882a593Smuzhiyunstatic inline __attribute_const__ __u32 __arch_swab32(__u32 x) 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun __asm__( 38*4882a593Smuzhiyun " .set push \n" 39*4882a593Smuzhiyun " .set arch=mips32r2 \n" 40*4882a593Smuzhiyun " wsbh %0, %1 \n" 41*4882a593Smuzhiyun " rotr %0, %0, 16 \n" 42*4882a593Smuzhiyun " .set pop \n" 43*4882a593Smuzhiyun : "=r" (x) 44*4882a593Smuzhiyun : "r" (x)); 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun return x; 47*4882a593Smuzhiyun } 48*4882a593Smuzhiyun #define __arch_swab32 __arch_swab32 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * Having already checked for MIPS R2, enable the optimized version for 52*4882a593Smuzhiyun * 64-bit kernel on r2 CPUs. 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun #ifdef __mips64 __arch_swab64(__u64 x)55*4882a593Smuzhiyunstatic inline __attribute_const__ __u64 __arch_swab64(__u64 x) 56*4882a593Smuzhiyun { 57*4882a593Smuzhiyun __asm__( 58*4882a593Smuzhiyun " .set push \n" 59*4882a593Smuzhiyun " .set arch=mips64r2 \n" 60*4882a593Smuzhiyun " dsbh %0, %1 \n" 61*4882a593Smuzhiyun " dshd %0, %0 \n" 62*4882a593Smuzhiyun " .set pop \n" 63*4882a593Smuzhiyun : "=r" (x) 64*4882a593Smuzhiyun : "r" (x)); 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun return x; 67*4882a593Smuzhiyun } 68*4882a593Smuzhiyun #define __arch_swab64 __arch_swab64 69*4882a593Smuzhiyun #endif /* __mips64 */ 70*4882a593Smuzhiyun #endif /* (not __mips16) and (MIPS R2 or newer or Loongson 3A) */ 71*4882a593Smuzhiyun #endif /* _ASM_SWAB_H */ 72