1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 4*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 5*4882a593Smuzhiyun * for more details. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle 8*4882a593Smuzhiyun * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef _UAPI_ASM_PTRACE_H 11*4882a593Smuzhiyun #define _UAPI_ASM_PTRACE_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ 16*4882a593Smuzhiyun #define FPR_BASE 32 17*4882a593Smuzhiyun #define PC 64 18*4882a593Smuzhiyun #define CAUSE 65 19*4882a593Smuzhiyun #define BADVADDR 66 20*4882a593Smuzhiyun #define MMHI 67 21*4882a593Smuzhiyun #define MMLO 68 22*4882a593Smuzhiyun #define FPC_CSR 69 23*4882a593Smuzhiyun #define FPC_EIR 70 24*4882a593Smuzhiyun #define DSP_BASE 71 /* 3 more hi / lo register pairs */ 25*4882a593Smuzhiyun #define DSP_CONTROL 77 26*4882a593Smuzhiyun #define ACX 78 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * This struct defines the registers as used by PTRACE_{GET,SET}REGS. The 30*4882a593Smuzhiyun * format is the same for both 32- and 64-bit processes. Registers for 32-bit 31*4882a593Smuzhiyun * processes are sign extended. 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #ifdef __KERNEL__ 34*4882a593Smuzhiyun struct user_pt_regs { 35*4882a593Smuzhiyun #else 36*4882a593Smuzhiyun struct pt_regs { 37*4882a593Smuzhiyun #endif 38*4882a593Smuzhiyun /* Saved main processor registers. */ 39*4882a593Smuzhiyun __u64 regs[32]; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* Saved special registers. */ 42*4882a593Smuzhiyun __u64 lo; 43*4882a593Smuzhiyun __u64 hi; 44*4882a593Smuzhiyun __u64 cp0_epc; 45*4882a593Smuzhiyun __u64 cp0_badvaddr; 46*4882a593Smuzhiyun __u64 cp0_status; 47*4882a593Smuzhiyun __u64 cp0_cause; 48*4882a593Smuzhiyun } __attribute__ ((aligned (8))); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 51*4882a593Smuzhiyun #define PTRACE_GETREGS 12 52*4882a593Smuzhiyun #define PTRACE_SETREGS 13 53*4882a593Smuzhiyun #define PTRACE_GETFPREGS 14 54*4882a593Smuzhiyun #define PTRACE_SETFPREGS 15 55*4882a593Smuzhiyun /* #define PTRACE_GETFPXREGS 18 */ 56*4882a593Smuzhiyun /* #define PTRACE_SETFPXREGS 19 */ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define PTRACE_OLDSETOPTIONS 21 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define PTRACE_GET_THREAD_AREA 25 61*4882a593Smuzhiyun #define PTRACE_SET_THREAD_AREA 26 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Calls to trace a 64bit program from a 32bit program. */ 64*4882a593Smuzhiyun #define PTRACE_PEEKTEXT_3264 0xc0 65*4882a593Smuzhiyun #define PTRACE_PEEKDATA_3264 0xc1 66*4882a593Smuzhiyun #define PTRACE_POKETEXT_3264 0xc2 67*4882a593Smuzhiyun #define PTRACE_POKEDATA_3264 0xc3 68*4882a593Smuzhiyun #define PTRACE_GET_THREAD_AREA_3264 0xc4 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* Read and write watchpoint registers. */ 71*4882a593Smuzhiyun enum pt_watch_style { 72*4882a593Smuzhiyun pt_watch_style_mips32, 73*4882a593Smuzhiyun pt_watch_style_mips64 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun struct mips32_watch_regs { 76*4882a593Smuzhiyun unsigned int watchlo[8]; 77*4882a593Smuzhiyun /* Lower 16 bits of watchhi. */ 78*4882a593Smuzhiyun unsigned short watchhi[8]; 79*4882a593Smuzhiyun /* Valid mask and I R W bits. 80*4882a593Smuzhiyun * bit 0 -- 1 if W bit is usable. 81*4882a593Smuzhiyun * bit 1 -- 1 if R bit is usable. 82*4882a593Smuzhiyun * bit 2 -- 1 if I bit is usable. 83*4882a593Smuzhiyun * bits 3 - 11 -- Valid watchhi mask bits. 84*4882a593Smuzhiyun */ 85*4882a593Smuzhiyun unsigned short watch_masks[8]; 86*4882a593Smuzhiyun /* The number of valid watch register pairs. */ 87*4882a593Smuzhiyun unsigned int num_valid; 88*4882a593Smuzhiyun } __attribute__((aligned(8))); 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct mips64_watch_regs { 91*4882a593Smuzhiyun unsigned long long watchlo[8]; 92*4882a593Smuzhiyun unsigned short watchhi[8]; 93*4882a593Smuzhiyun unsigned short watch_masks[8]; 94*4882a593Smuzhiyun unsigned int num_valid; 95*4882a593Smuzhiyun } __attribute__((aligned(8))); 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun struct pt_watch_regs { 98*4882a593Smuzhiyun enum pt_watch_style style; 99*4882a593Smuzhiyun union { 100*4882a593Smuzhiyun struct mips32_watch_regs mips32; 101*4882a593Smuzhiyun struct mips64_watch_regs mips64; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #define PTRACE_GET_WATCH_REGS 0xd0 106*4882a593Smuzhiyun #define PTRACE_SET_WATCH_REGS 0xd1 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif /* _UAPI_ASM_PTRACE_H */ 110