1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Include file for NEC VR4100 series General-purpose I/O Unit. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2005-2009 Yoichi Yuasa <yuasa@linux-mips.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef __NEC_VR41XX_GIU_H 8*4882a593Smuzhiyun #define __NEC_VR41XX_GIU_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 11*4882a593Smuzhiyun * NEC VR4100 series GIU platform device IDs. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun enum { 14*4882a593Smuzhiyun GPIO_50PINS_PULLUPDOWN, 15*4882a593Smuzhiyun GPIO_36PINS, 16*4882a593Smuzhiyun GPIO_48PINS_EDGE_SELECT, 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun typedef enum { 20*4882a593Smuzhiyun IRQ_TRIGGER_LEVEL, 21*4882a593Smuzhiyun IRQ_TRIGGER_EDGE, 22*4882a593Smuzhiyun IRQ_TRIGGER_EDGE_FALLING, 23*4882a593Smuzhiyun IRQ_TRIGGER_EDGE_RISING, 24*4882a593Smuzhiyun } irq_trigger_t; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun typedef enum { 27*4882a593Smuzhiyun IRQ_SIGNAL_THROUGH, 28*4882a593Smuzhiyun IRQ_SIGNAL_HOLD, 29*4882a593Smuzhiyun } irq_signal_t; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, 32*4882a593Smuzhiyun irq_signal_t signal); 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun typedef enum { 35*4882a593Smuzhiyun IRQ_LEVEL_LOW, 36*4882a593Smuzhiyun IRQ_LEVEL_HIGH, 37*4882a593Smuzhiyun } irq_level_t; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #endif /* __NEC_VR41XX_GIU_H */ 42