1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef __ASM_UPROBES_H 7*4882a593Smuzhiyun #define __ASM_UPROBES_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/notifier.h> 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/break.h> 13*4882a593Smuzhiyun #include <asm/inst.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * We want this to be defined as union mips_instruction but that makes the 17*4882a593Smuzhiyun * generic code blow up. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun typedef u32 uprobe_opcode_t; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * Classic MIPS (note this implementation doesn't consider microMIPS yet) 23*4882a593Smuzhiyun * instructions are always 4 bytes but in order to deal with branches and 24*4882a593Smuzhiyun * their delay slots, we treat instructions as having 8 bytes maximum. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define MAX_UINSN_BYTES 8 27*4882a593Smuzhiyun #define UPROBE_XOL_SLOT_BYTES 128 /* Max. cache line size */ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define UPROBE_BRK_UPROBE 0x000d000d /* break 13 */ 30*4882a593Smuzhiyun #define UPROBE_BRK_UPROBE_XOL 0x000e000d /* break 14 */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define UPROBE_SWBP_INSN UPROBE_BRK_UPROBE 33*4882a593Smuzhiyun #define UPROBE_SWBP_INSN_SIZE 4 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct arch_uprobe { 36*4882a593Smuzhiyun unsigned long resume_epc; 37*4882a593Smuzhiyun u32 insn[2]; 38*4882a593Smuzhiyun u32 ixol[2]; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun struct arch_uprobe_task { 42*4882a593Smuzhiyun unsigned long saved_trap_nr; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif /* __ASM_UPROBES_H */ 46