1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2013 Imagination Technologies 4*4882a593Smuzhiyun * Author: Paul Burton <paul.burton@mips.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __MIPS_ASM_SMP_CPS_H__ 8*4882a593Smuzhiyun #define __MIPS_ASM_SMP_CPS_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct vpe_boot_config { 13*4882a593Smuzhiyun unsigned long pc; 14*4882a593Smuzhiyun unsigned long sp; 15*4882a593Smuzhiyun unsigned long gp; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct core_boot_config { 19*4882a593Smuzhiyun atomic_t vpe_mask; 20*4882a593Smuzhiyun struct vpe_boot_config *vpe_config; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun extern struct core_boot_config *mips_cps_core_bootcfg; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun extern void mips_cps_core_entry(void); 26*4882a593Smuzhiyun extern void mips_cps_core_init(void); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun extern void mips_cps_boot_vpes(struct core_boot_config *cfg, unsigned vpe); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun extern void mips_cps_pm_save(void); 31*4882a593Smuzhiyun extern void mips_cps_pm_restore(void); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #ifdef CONFIG_MIPS_CPS 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun extern bool mips_cps_smp_in_use(void); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #else /* !CONFIG_MIPS_CPS */ 38*4882a593Smuzhiyun mips_cps_smp_in_use(void)39*4882a593Smuzhiyunstatic inline bool mips_cps_smp_in_use(void) { return false; } 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #endif /* !CONFIG_MIPS_CPS */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #else /* __ASSEMBLY__ */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun .extern mips_cps_bootcfg; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 48*4882a593Smuzhiyun #endif /* __MIPS_ASM_SMP_CPS_H__ */ 49