1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __ASM_SIBYTE_SWARM_H 6*4882a593Smuzhiyun #define __ASM_SIBYTE_SWARM_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <asm/sibyte/sb1250.h> 9*4882a593Smuzhiyun #include <asm/sibyte/sb1250_int.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifdef CONFIG_SIBYTE_SWARM 12*4882a593Smuzhiyun #define SIBYTE_BOARD_NAME "BCM91250A (SWARM)" 13*4882a593Smuzhiyun #define SIBYTE_HAVE_PCMCIA 1 14*4882a593Smuzhiyun #define SIBYTE_HAVE_IDE 1 15*4882a593Smuzhiyun #endif 16*4882a593Smuzhiyun #ifdef CONFIG_SIBYTE_LITTLESUR 17*4882a593Smuzhiyun #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" 18*4882a593Smuzhiyun #define SIBYTE_HAVE_PCMCIA 0 19*4882a593Smuzhiyun #define SIBYTE_HAVE_IDE 1 20*4882a593Smuzhiyun #define SIBYTE_DEFAULT_CONSOLE "cfe0" 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun #ifdef CONFIG_SIBYTE_CRHONE 23*4882a593Smuzhiyun #define SIBYTE_BOARD_NAME "BCM91125C (CRhone)" 24*4882a593Smuzhiyun #define SIBYTE_HAVE_PCMCIA 0 25*4882a593Smuzhiyun #define SIBYTE_HAVE_IDE 0 26*4882a593Smuzhiyun #endif 27*4882a593Smuzhiyun #ifdef CONFIG_SIBYTE_CRHINE 28*4882a593Smuzhiyun #define SIBYTE_BOARD_NAME "BCM91120C (CRhine)" 29*4882a593Smuzhiyun #define SIBYTE_HAVE_PCMCIA 0 30*4882a593Smuzhiyun #define SIBYTE_HAVE_IDE 0 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Generic bus chip selects */ 34*4882a593Smuzhiyun #define LEDS_CS 3 35*4882a593Smuzhiyun #define LEDS_PHYS 0x100a0000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #ifdef SIBYTE_HAVE_IDE 38*4882a593Smuzhiyun #define IDE_CS 4 39*4882a593Smuzhiyun #define IDE_PHYS 0x100b0000 40*4882a593Smuzhiyun #define K_GPIO_GB_IDE 4 41*4882a593Smuzhiyun #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 42*4882a593Smuzhiyun #endif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #ifdef SIBYTE_HAVE_PCMCIA 45*4882a593Smuzhiyun #define PCMCIA_CS 6 46*4882a593Smuzhiyun #define PCMCIA_PHYS 0x11000000 47*4882a593Smuzhiyun #define K_GPIO_PC_READY 9 48*4882a593Smuzhiyun #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #endif /* __ASM_SIBYTE_SWARM_H */ 52