1*4882a593Smuzhiyun /***********************license start***************
2*4882a593Smuzhiyun * Author: Cavium Networks
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Contact: support@caviumnetworks.com
5*4882a593Smuzhiyun * This file is part of the OCTEON SDK
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003-2008 Cavium Networks
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun * published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more
17*4882a593Smuzhiyun * details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun * along with this file; if not, write to the Free Software
21*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*4882a593Smuzhiyun * or visit http://www.gnu.org/licenses/.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * This file may also be available under a different license from Cavium.
25*4882a593Smuzhiyun * Contact Cavium Networks for more information
26*4882a593Smuzhiyun ***********************license end**************************************/
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * File defining checks for different Octeon features.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #ifndef __OCTEON_FEATURE_H__
33*4882a593Smuzhiyun #define __OCTEON_FEATURE_H__
34*4882a593Smuzhiyun #include <asm/octeon/cvmx-mio-defs.h>
35*4882a593Smuzhiyun #include <asm/octeon/cvmx-rnm-defs.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun enum octeon_feature {
38*4882a593Smuzhiyun /* CN68XX uses port kinds for packet interface */
39*4882a593Smuzhiyun OCTEON_FEATURE_PKND,
40*4882a593Smuzhiyun /* CN68XX has different fields in word0 - word2 */
41*4882a593Smuzhiyun OCTEON_FEATURE_CN68XX_WQE,
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun * Octeon models in the CN5XXX family and higher support
44*4882a593Smuzhiyun * atomic add instructions to memory (saa/saad).
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun OCTEON_FEATURE_SAAD,
47*4882a593Smuzhiyun /* Does this Octeon support the ZIP offload engine? */
48*4882a593Smuzhiyun OCTEON_FEATURE_ZIP,
49*4882a593Smuzhiyun OCTEON_FEATURE_DORM_CRYPTO,
50*4882a593Smuzhiyun /* Does this Octeon support PCI express? */
51*4882a593Smuzhiyun OCTEON_FEATURE_PCIE,
52*4882a593Smuzhiyun /* Does this Octeon support SRIOs */
53*4882a593Smuzhiyun OCTEON_FEATURE_SRIO,
54*4882a593Smuzhiyun /* Does this Octeon support Interlaken */
55*4882a593Smuzhiyun OCTEON_FEATURE_ILK,
56*4882a593Smuzhiyun /* Some Octeon models support internal memory for storing
57*4882a593Smuzhiyun * cryptographic keys */
58*4882a593Smuzhiyun OCTEON_FEATURE_KEY_MEMORY,
59*4882a593Smuzhiyun /* Octeon has a LED controller for banks of external LEDs */
60*4882a593Smuzhiyun OCTEON_FEATURE_LED_CONTROLLER,
61*4882a593Smuzhiyun /* Octeon has a trace buffer */
62*4882a593Smuzhiyun OCTEON_FEATURE_TRA,
63*4882a593Smuzhiyun /* Octeon has a management port */
64*4882a593Smuzhiyun OCTEON_FEATURE_MGMT_PORT,
65*4882a593Smuzhiyun /* Octeon has a raid unit */
66*4882a593Smuzhiyun OCTEON_FEATURE_RAID,
67*4882a593Smuzhiyun /* Octeon has a builtin USB */
68*4882a593Smuzhiyun OCTEON_FEATURE_USB,
69*4882a593Smuzhiyun /* Octeon IPD can run without using work queue entries */
70*4882a593Smuzhiyun OCTEON_FEATURE_NO_WPTR,
71*4882a593Smuzhiyun /* Octeon has DFA state machines */
72*4882a593Smuzhiyun OCTEON_FEATURE_DFA,
73*4882a593Smuzhiyun /* Octeon MDIO block supports clause 45 transactions for 10
74*4882a593Smuzhiyun * Gig support */
75*4882a593Smuzhiyun OCTEON_FEATURE_MDIO_CLAUSE_45,
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun * CN52XX and CN56XX used a block named NPEI for PCIe
78*4882a593Smuzhiyun * access. Newer chips replaced this with SLI+DPI.
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun OCTEON_FEATURE_NPEI,
81*4882a593Smuzhiyun OCTEON_FEATURE_HFA,
82*4882a593Smuzhiyun OCTEON_FEATURE_DFM,
83*4882a593Smuzhiyun OCTEON_FEATURE_CIU2,
84*4882a593Smuzhiyun OCTEON_FEATURE_CIU3,
85*4882a593Smuzhiyun /* Octeon has FPA first seen on 78XX */
86*4882a593Smuzhiyun OCTEON_FEATURE_FPA3,
87*4882a593Smuzhiyun OCTEON_FEATURE_FAU,
88*4882a593Smuzhiyun OCTEON_MAX_FEATURE
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun enum octeon_feature_bits {
92*4882a593Smuzhiyun OCTEON_HAS_CRYPTO = 0x0001, /* Crypto acceleration using COP2 */
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun extern enum octeon_feature_bits __octeon_feature_bits;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /**
97*4882a593Smuzhiyun * octeon_has_crypto() - Check if this OCTEON has crypto acceleration support.
98*4882a593Smuzhiyun *
99*4882a593Smuzhiyun * Returns: Non-zero if the feature exists. Zero if the feature does not exist.
100*4882a593Smuzhiyun */
octeon_has_crypto(void)101*4882a593Smuzhiyun static inline int octeon_has_crypto(void)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun return __octeon_feature_bits & OCTEON_HAS_CRYPTO;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /**
107*4882a593Smuzhiyun * Determine if the current Octeon supports a specific feature. These
108*4882a593Smuzhiyun * checks have been optimized to be fairly quick, but they should still
109*4882a593Smuzhiyun * be kept out of fast path code.
110*4882a593Smuzhiyun *
111*4882a593Smuzhiyun * @feature: Feature to check for. This should always be a constant so the
112*4882a593Smuzhiyun * compiler can remove the switch statement through optimization.
113*4882a593Smuzhiyun *
114*4882a593Smuzhiyun * Returns Non zero if the feature exists. Zero if the feature does not
115*4882a593Smuzhiyun * exist.
116*4882a593Smuzhiyun */
octeon_has_feature(enum octeon_feature feature)117*4882a593Smuzhiyun static inline bool octeon_has_feature(enum octeon_feature feature)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun switch (feature) {
120*4882a593Smuzhiyun case OCTEON_FEATURE_SAAD:
121*4882a593Smuzhiyun return !OCTEON_IS_MODEL(OCTEON_CN3XXX);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun case OCTEON_FEATURE_DORM_CRYPTO:
124*4882a593Smuzhiyun if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
125*4882a593Smuzhiyun union cvmx_mio_fus_dat2 fus_2;
126*4882a593Smuzhiyun fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
127*4882a593Smuzhiyun return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
128*4882a593Smuzhiyun } else {
129*4882a593Smuzhiyun return false;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun case OCTEON_FEATURE_PCIE:
133*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN56XX)
134*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN52XX)
135*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN6XXX)
136*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN7XXX);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun case OCTEON_FEATURE_SRIO:
139*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN63XX)
140*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN66XX);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun case OCTEON_FEATURE_ILK:
143*4882a593Smuzhiyun return (OCTEON_IS_MODEL(OCTEON_CN68XX));
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun case OCTEON_FEATURE_KEY_MEMORY:
146*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN38XX)
147*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN58XX)
148*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN56XX)
149*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN6XXX);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun case OCTEON_FEATURE_LED_CONTROLLER:
152*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN38XX)
153*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN58XX)
154*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN56XX);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun case OCTEON_FEATURE_TRA:
157*4882a593Smuzhiyun return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
158*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN50XX));
159*4882a593Smuzhiyun case OCTEON_FEATURE_MGMT_PORT:
160*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN56XX)
161*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN52XX)
162*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN6XXX);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun case OCTEON_FEATURE_RAID:
165*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN56XX)
166*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN52XX)
167*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN6XXX);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun case OCTEON_FEATURE_USB:
170*4882a593Smuzhiyun return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
171*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN58XX));
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun case OCTEON_FEATURE_NO_WPTR:
174*4882a593Smuzhiyun return (OCTEON_IS_MODEL(OCTEON_CN56XX)
175*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN52XX)
176*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN6XXX))
177*4882a593Smuzhiyun && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
178*4882a593Smuzhiyun && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun case OCTEON_FEATURE_MDIO_CLAUSE_45:
181*4882a593Smuzhiyun return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
182*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN58XX)
183*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN50XX));
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun case OCTEON_FEATURE_NPEI:
186*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN56XX)
187*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN52XX);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun case OCTEON_FEATURE_PKND:
190*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN68XX);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun case OCTEON_FEATURE_CN68XX_WQE:
193*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN68XX);
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun case OCTEON_FEATURE_CIU2:
196*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN68XX);
197*4882a593Smuzhiyun case OCTEON_FEATURE_CIU3:
198*4882a593Smuzhiyun case OCTEON_FEATURE_FPA3:
199*4882a593Smuzhiyun return OCTEON_IS_MODEL(OCTEON_CN78XX)
200*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CNF75XX)
201*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN73XX);
202*4882a593Smuzhiyun case OCTEON_FEATURE_FAU:
203*4882a593Smuzhiyun return !(OCTEON_IS_MODEL(OCTEON_CN78XX)
204*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CNF75XX)
205*4882a593Smuzhiyun || OCTEON_IS_MODEL(OCTEON_CN73XX));
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun default:
208*4882a593Smuzhiyun break;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun return false;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun #endif /* __OCTEON_FEATURE_H__ */
214