xref: /OK3568_Linux_fs/kernel/arch/mips/include/asm/octeon/cvmx-rnm-defs.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /***********************license start***************
2*4882a593Smuzhiyun  * Author: Cavium Networks
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Contact: support@caviumnetworks.com
5*4882a593Smuzhiyun  * This file is part of the OCTEON SDK
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (c) 2003-2012 Cavium Networks
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun  * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun  * published by the Free Software Foundation.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun  * NONINFRINGEMENT.  See the GNU General Public License for more
17*4882a593Smuzhiyun  * details.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun  * along with this file; if not, write to the Free Software
21*4882a593Smuzhiyun  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*4882a593Smuzhiyun  * or visit http://www.gnu.org/licenses/.
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * This file may also be available under a different license from Cavium.
25*4882a593Smuzhiyun  * Contact Cavium Networks for more information
26*4882a593Smuzhiyun  ***********************license end**************************************/
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifndef __CVMX_RNM_DEFS_H__
29*4882a593Smuzhiyun #define __CVMX_RNM_DEFS_H__
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
32*4882a593Smuzhiyun #define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
33*4882a593Smuzhiyun #define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
34*4882a593Smuzhiyun #define CVMX_RNM_EER_KEY (CVMX_ADD_IO_SEG(0x0001180040000010ull))
35*4882a593Smuzhiyun #define CVMX_RNM_SERIAL_NUM (CVMX_ADD_IO_SEG(0x0001180040000020ull))
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun union cvmx_rnm_bist_status {
38*4882a593Smuzhiyun 	uint64_t u64;
39*4882a593Smuzhiyun 	struct cvmx_rnm_bist_status_s {
40*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
41*4882a593Smuzhiyun 		uint64_t reserved_2_63:62;
42*4882a593Smuzhiyun 		uint64_t rrc:1;
43*4882a593Smuzhiyun 		uint64_t mem:1;
44*4882a593Smuzhiyun #else
45*4882a593Smuzhiyun 		uint64_t mem:1;
46*4882a593Smuzhiyun 		uint64_t rrc:1;
47*4882a593Smuzhiyun 		uint64_t reserved_2_63:62;
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun 	} s;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun union cvmx_rnm_ctl_status {
53*4882a593Smuzhiyun 	uint64_t u64;
54*4882a593Smuzhiyun 	struct cvmx_rnm_ctl_status_s {
55*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
56*4882a593Smuzhiyun 		uint64_t reserved_12_63:52;
57*4882a593Smuzhiyun 		uint64_t dis_mak:1;
58*4882a593Smuzhiyun 		uint64_t eer_lck:1;
59*4882a593Smuzhiyun 		uint64_t eer_val:1;
60*4882a593Smuzhiyun 		uint64_t ent_sel:4;
61*4882a593Smuzhiyun 		uint64_t exp_ent:1;
62*4882a593Smuzhiyun 		uint64_t rng_rst:1;
63*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
64*4882a593Smuzhiyun 		uint64_t rng_en:1;
65*4882a593Smuzhiyun 		uint64_t ent_en:1;
66*4882a593Smuzhiyun #else
67*4882a593Smuzhiyun 		uint64_t ent_en:1;
68*4882a593Smuzhiyun 		uint64_t rng_en:1;
69*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
70*4882a593Smuzhiyun 		uint64_t rng_rst:1;
71*4882a593Smuzhiyun 		uint64_t exp_ent:1;
72*4882a593Smuzhiyun 		uint64_t ent_sel:4;
73*4882a593Smuzhiyun 		uint64_t eer_val:1;
74*4882a593Smuzhiyun 		uint64_t eer_lck:1;
75*4882a593Smuzhiyun 		uint64_t dis_mak:1;
76*4882a593Smuzhiyun 		uint64_t reserved_12_63:52;
77*4882a593Smuzhiyun #endif
78*4882a593Smuzhiyun 	} s;
79*4882a593Smuzhiyun 	struct cvmx_rnm_ctl_status_cn30xx {
80*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
81*4882a593Smuzhiyun 		uint64_t reserved_4_63:60;
82*4882a593Smuzhiyun 		uint64_t rng_rst:1;
83*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
84*4882a593Smuzhiyun 		uint64_t rng_en:1;
85*4882a593Smuzhiyun 		uint64_t ent_en:1;
86*4882a593Smuzhiyun #else
87*4882a593Smuzhiyun 		uint64_t ent_en:1;
88*4882a593Smuzhiyun 		uint64_t rng_en:1;
89*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
90*4882a593Smuzhiyun 		uint64_t rng_rst:1;
91*4882a593Smuzhiyun 		uint64_t reserved_4_63:60;
92*4882a593Smuzhiyun #endif
93*4882a593Smuzhiyun 	} cn30xx;
94*4882a593Smuzhiyun 	struct cvmx_rnm_ctl_status_cn50xx {
95*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
96*4882a593Smuzhiyun 		uint64_t reserved_9_63:55;
97*4882a593Smuzhiyun 		uint64_t ent_sel:4;
98*4882a593Smuzhiyun 		uint64_t exp_ent:1;
99*4882a593Smuzhiyun 		uint64_t rng_rst:1;
100*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
101*4882a593Smuzhiyun 		uint64_t rng_en:1;
102*4882a593Smuzhiyun 		uint64_t ent_en:1;
103*4882a593Smuzhiyun #else
104*4882a593Smuzhiyun 		uint64_t ent_en:1;
105*4882a593Smuzhiyun 		uint64_t rng_en:1;
106*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
107*4882a593Smuzhiyun 		uint64_t rng_rst:1;
108*4882a593Smuzhiyun 		uint64_t exp_ent:1;
109*4882a593Smuzhiyun 		uint64_t ent_sel:4;
110*4882a593Smuzhiyun 		uint64_t reserved_9_63:55;
111*4882a593Smuzhiyun #endif
112*4882a593Smuzhiyun 	} cn50xx;
113*4882a593Smuzhiyun 	struct cvmx_rnm_ctl_status_cn63xx {
114*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
115*4882a593Smuzhiyun 		uint64_t reserved_11_63:53;
116*4882a593Smuzhiyun 		uint64_t eer_lck:1;
117*4882a593Smuzhiyun 		uint64_t eer_val:1;
118*4882a593Smuzhiyun 		uint64_t ent_sel:4;
119*4882a593Smuzhiyun 		uint64_t exp_ent:1;
120*4882a593Smuzhiyun 		uint64_t rng_rst:1;
121*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
122*4882a593Smuzhiyun 		uint64_t rng_en:1;
123*4882a593Smuzhiyun 		uint64_t ent_en:1;
124*4882a593Smuzhiyun #else
125*4882a593Smuzhiyun 		uint64_t ent_en:1;
126*4882a593Smuzhiyun 		uint64_t rng_en:1;
127*4882a593Smuzhiyun 		uint64_t rnm_rst:1;
128*4882a593Smuzhiyun 		uint64_t rng_rst:1;
129*4882a593Smuzhiyun 		uint64_t exp_ent:1;
130*4882a593Smuzhiyun 		uint64_t ent_sel:4;
131*4882a593Smuzhiyun 		uint64_t eer_val:1;
132*4882a593Smuzhiyun 		uint64_t eer_lck:1;
133*4882a593Smuzhiyun 		uint64_t reserved_11_63:53;
134*4882a593Smuzhiyun #endif
135*4882a593Smuzhiyun 	} cn63xx;
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun union cvmx_rnm_eer_dbg {
139*4882a593Smuzhiyun 	uint64_t u64;
140*4882a593Smuzhiyun 	struct cvmx_rnm_eer_dbg_s {
141*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
142*4882a593Smuzhiyun 		uint64_t dat:64;
143*4882a593Smuzhiyun #else
144*4882a593Smuzhiyun 		uint64_t dat:64;
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun 	} s;
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun union cvmx_rnm_eer_key {
150*4882a593Smuzhiyun 	uint64_t u64;
151*4882a593Smuzhiyun 	struct cvmx_rnm_eer_key_s {
152*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
153*4882a593Smuzhiyun 		uint64_t key:64;
154*4882a593Smuzhiyun #else
155*4882a593Smuzhiyun 		uint64_t key:64;
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun 	} s;
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun union cvmx_rnm_serial_num {
161*4882a593Smuzhiyun 	uint64_t u64;
162*4882a593Smuzhiyun 	struct cvmx_rnm_serial_num_s {
163*4882a593Smuzhiyun #ifdef __BIG_ENDIAN_BITFIELD
164*4882a593Smuzhiyun 		uint64_t dat:64;
165*4882a593Smuzhiyun #else
166*4882a593Smuzhiyun 		uint64_t dat:64;
167*4882a593Smuzhiyun #endif
168*4882a593Smuzhiyun 	} s;
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun #endif
172