1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H 3*4882a593Smuzhiyun #define __ASM_MACH_TX49XX_MANGLE_PORT_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define __swizzle_addr_b(port) (port) 6*4882a593Smuzhiyun #define __swizzle_addr_w(port) (port) 7*4882a593Smuzhiyun #define __swizzle_addr_l(port) (port) 8*4882a593Smuzhiyun #define __swizzle_addr_q(port) (port) 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define ioswabb(a, x) (x) 11*4882a593Smuzhiyun #define __mem_ioswabb(a, x) (x) 12*4882a593Smuzhiyun #if defined(CONFIG_TOSHIBA_RBTX4939) && \ 13*4882a593Smuzhiyun IS_ENABLED(CONFIG_SMC91X) && \ 14*4882a593Smuzhiyun defined(__BIG_ENDIAN) 15*4882a593Smuzhiyun #define NEEDS_TXX9_IOSWABW 16*4882a593Smuzhiyun extern u16 (*ioswabw)(volatile u16 *a, u16 x); 17*4882a593Smuzhiyun extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); 18*4882a593Smuzhiyun #else 19*4882a593Smuzhiyun #define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) 20*4882a593Smuzhiyun #define __mem_ioswabw(a, x) (x) 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun #define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) 23*4882a593Smuzhiyun #define __mem_ioswabl(a, x) (x) 24*4882a593Smuzhiyun #define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) 25*4882a593Smuzhiyun #define __mem_ioswabq(a, x) (x) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */ 28