1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2015 Zhang, Keguang <keguang.zhang@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Loongson 1 NAND platform support. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __ASM_MACH_LOONGSON32_DMA_H 9*4882a593Smuzhiyun #define __ASM_MACH_LOONGSON32_DMA_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define LS1X_DMA_CHANNEL0 0 12*4882a593Smuzhiyun #define LS1X_DMA_CHANNEL1 1 13*4882a593Smuzhiyun #define LS1X_DMA_CHANNEL2 2 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun struct plat_ls1x_dma { 16*4882a593Smuzhiyun int nr_channels; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun extern struct plat_ls1x_dma ls1b_dma_pdata; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif /* __ASM_MACH_LOONGSON32_DMA_H */ 22