1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2003, 07 Ralf Baechle 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H 9*4882a593Smuzhiyun #define __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <asm/cpu.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun * IP22 with a variety of processors so we can't use defaults for everything. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun #define cpu_has_tlb 1 17*4882a593Smuzhiyun #define cpu_has_4kex 1 18*4882a593Smuzhiyun #define cpu_has_4k_cache 1 19*4882a593Smuzhiyun #define cpu_has_32fpr 1 20*4882a593Smuzhiyun #define cpu_has_counter 1 21*4882a593Smuzhiyun #define cpu_has_mips16 0 22*4882a593Smuzhiyun #define cpu_has_mips16e2 0 23*4882a593Smuzhiyun #define cpu_has_divec 0 24*4882a593Smuzhiyun #define cpu_has_cache_cdex_p 1 25*4882a593Smuzhiyun #define cpu_has_prefetch 0 26*4882a593Smuzhiyun #define cpu_has_mcheck 0 27*4882a593Smuzhiyun #define cpu_has_ejtag 0 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define cpu_has_llsc 1 30*4882a593Smuzhiyun #define cpu_has_vtag_icache 0 /* Needs to change for R8000 */ 31*4882a593Smuzhiyun #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) 32*4882a593Smuzhiyun #define cpu_has_ic_fills_f_dc 0 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define cpu_has_dsp 0 35*4882a593Smuzhiyun #define cpu_has_dsp2 0 36*4882a593Smuzhiyun #define cpu_has_mipsmt 0 37*4882a593Smuzhiyun #define cpu_has_userlocal 0 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define cpu_has_nofpuex 0 40*4882a593Smuzhiyun #define cpu_has_64bits 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define cpu_has_mips_2 1 43*4882a593Smuzhiyun #define cpu_has_mips_3 1 44*4882a593Smuzhiyun #define cpu_has_mips_5 0 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define cpu_has_mips32r1 0 47*4882a593Smuzhiyun #define cpu_has_mips32r2 0 48*4882a593Smuzhiyun #define cpu_has_mips64r1 0 49*4882a593Smuzhiyun #define cpu_has_mips64r2 0 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */ 52