1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2018 MIPS Tech, LLC 4*4882a593Smuzhiyun * Author: Matt Redfearn <matt.redfearn@mips.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __MIPS_ASM_ISA_REV_H__ 8*4882a593Smuzhiyun #define __MIPS_ASM_ISA_REV_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 11*4882a593Smuzhiyun * The ISA revision level. This is 0 for MIPS I to V and N for 12*4882a593Smuzhiyun * MIPS{32,64}rN. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* If the compiler has defined __mips_isa_rev, believe it. */ 16*4882a593Smuzhiyun #ifdef __mips_isa_rev 17*4882a593Smuzhiyun #define MIPS_ISA_REV __mips_isa_rev 18*4882a593Smuzhiyun #else 19*4882a593Smuzhiyun /* The compiler hasn't defined the isa rev so assume it's MIPS I - V (0) */ 20*4882a593Smuzhiyun #define MIPS_ISA_REV 0 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #endif /* __MIPS_ASM_ISA_REV_H__ */ 25