1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
7*4882a593Smuzhiyun * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #ifndef _ASM_IRQ_H
10*4882a593Smuzhiyun #define _ASM_IRQ_H
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/linkage.h>
13*4882a593Smuzhiyun #include <linux/smp.h>
14*4882a593Smuzhiyun #include <linux/irqdomain.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <asm/mipsmtregs.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <irq.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define IRQ_STACK_SIZE THREAD_SIZE
21*4882a593Smuzhiyun #define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun extern void *irq_stack[NR_CPUS];
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * The highest address on the IRQ stack contains a dummy frame put down in
27*4882a593Smuzhiyun * genex.S (handle_int & except_vec_vi_handler) which is structured as follows:
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * top ------------
30*4882a593Smuzhiyun * | task sp | <- irq_stack[cpu] + IRQ_STACK_START
31*4882a593Smuzhiyun * ------------
32*4882a593Smuzhiyun * | | <- First frame of IRQ context
33*4882a593Smuzhiyun * ------------
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * task sp holds a copy of the task stack pointer where the struct pt_regs
36*4882a593Smuzhiyun * from exception entry can be found.
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun
on_irq_stack(int cpu,unsigned long sp)39*4882a593Smuzhiyun static inline bool on_irq_stack(int cpu, unsigned long sp)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun unsigned long low = (unsigned long)irq_stack[cpu];
42*4882a593Smuzhiyun unsigned long high = low + IRQ_STACK_SIZE;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun return (low <= sp && sp <= high);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #ifdef CONFIG_I8259
irq_canonicalize(int irq)48*4882a593Smuzhiyun static inline int irq_canonicalize(int irq)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun #else
53*4882a593Smuzhiyun #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun asmlinkage void plat_irq_dispatch(void);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun extern void do_IRQ(unsigned int irq);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun extern void arch_init_irq(void);
61*4882a593Smuzhiyun extern void spurious_interrupt(void);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun extern int allocate_irqno(void);
64*4882a593Smuzhiyun extern void alloc_legacy_irqno(void);
65*4882a593Smuzhiyun extern void free_irqno(unsigned int irq);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * Before R2 the timer and performance counter interrupts were both fixed to
69*4882a593Smuzhiyun * IE7. Since R2 their number has to be read from the c0_intctl register.
70*4882a593Smuzhiyun */
71*4882a593Smuzhiyun #define CP0_LEGACY_COMPARE_IRQ 7
72*4882a593Smuzhiyun #define CP0_LEGACY_PERFCNT_IRQ 7
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun extern int cp0_compare_irq;
75*4882a593Smuzhiyun extern int cp0_compare_irq_shift;
76*4882a593Smuzhiyun extern int cp0_perfcount_irq;
77*4882a593Smuzhiyun extern int cp0_fdc_irq;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun extern int get_c0_fdc_int(void);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
82*4882a593Smuzhiyun bool exclude_self);
83*4882a593Smuzhiyun #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #endif /* _ASM_IRQ_H */
86