xref: /OK3568_Linux_fs/kernel/arch/mips/include/asm/ip32/ip32_ints.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun  * for more details.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2000 Harald Koerfgen
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __ASM_IP32_INTS_H
10*4882a593Smuzhiyun #define __ASM_IP32_INTS_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/irq.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun  * This list reflects the assignment of interrupt numbers to
16*4882a593Smuzhiyun  * interrupting events.	 Order is fairly irrelevant to handling
17*4882a593Smuzhiyun  * priority.  This differs from irix.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun enum ip32_irq_no {
21*4882a593Smuzhiyun 	/*
22*4882a593Smuzhiyun 	 * CPU interrupts are 0 ... 7
23*4882a593Smuzhiyun 	 */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	CRIME_IRQ_BASE			= MIPS_CPU_IRQ_BASE + 8,
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	/*
28*4882a593Smuzhiyun 	 * MACE
29*4882a593Smuzhiyun 	 */
30*4882a593Smuzhiyun 	MACE_VID_IN1_IRQ		= CRIME_IRQ_BASE,
31*4882a593Smuzhiyun 	MACE_VID_IN2_IRQ,
32*4882a593Smuzhiyun 	MACE_VID_OUT_IRQ,
33*4882a593Smuzhiyun 	MACE_ETHERNET_IRQ,
34*4882a593Smuzhiyun 	/* SUPERIO, MISC, and AUDIO are MACEISA */
35*4882a593Smuzhiyun 	__MACE_SUPERIO,
36*4882a593Smuzhiyun 	__MACE_MISC,
37*4882a593Smuzhiyun 	__MACE_AUDIO,
38*4882a593Smuzhiyun 	MACE_PCI_BRIDGE_IRQ,
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	/*
41*4882a593Smuzhiyun 	 * MACEPCI
42*4882a593Smuzhiyun 	 */
43*4882a593Smuzhiyun 	MACEPCI_SCSI0_IRQ,
44*4882a593Smuzhiyun 	MACEPCI_SCSI1_IRQ,
45*4882a593Smuzhiyun 	MACEPCI_SLOT0_IRQ,
46*4882a593Smuzhiyun 	MACEPCI_SLOT1_IRQ,
47*4882a593Smuzhiyun 	MACEPCI_SLOT2_IRQ,
48*4882a593Smuzhiyun 	MACEPCI_SHARED0_IRQ,
49*4882a593Smuzhiyun 	MACEPCI_SHARED1_IRQ,
50*4882a593Smuzhiyun 	MACEPCI_SHARED2_IRQ,
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	/*
53*4882a593Smuzhiyun 	 * CRIME
54*4882a593Smuzhiyun 	 */
55*4882a593Smuzhiyun 	CRIME_GBE0_IRQ,
56*4882a593Smuzhiyun 	CRIME_GBE1_IRQ,
57*4882a593Smuzhiyun 	CRIME_GBE2_IRQ,
58*4882a593Smuzhiyun 	CRIME_GBE3_IRQ,
59*4882a593Smuzhiyun 	CRIME_CPUERR_IRQ,
60*4882a593Smuzhiyun 	CRIME_MEMERR_IRQ,
61*4882a593Smuzhiyun 	CRIME_RE_EMPTY_E_IRQ,
62*4882a593Smuzhiyun 	CRIME_RE_FULL_E_IRQ,
63*4882a593Smuzhiyun 	CRIME_RE_IDLE_E_IRQ,
64*4882a593Smuzhiyun 	CRIME_RE_EMPTY_L_IRQ,
65*4882a593Smuzhiyun 	CRIME_RE_FULL_L_IRQ,
66*4882a593Smuzhiyun 	CRIME_RE_IDLE_L_IRQ,
67*4882a593Smuzhiyun 	CRIME_SOFT0_IRQ,
68*4882a593Smuzhiyun 	CRIME_SOFT1_IRQ,
69*4882a593Smuzhiyun 	CRIME_SOFT2_IRQ,
70*4882a593Smuzhiyun 	CRIME_SYSCORERR_IRQ		= CRIME_SOFT2_IRQ,
71*4882a593Smuzhiyun 	CRIME_VICE_IRQ,
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/*
74*4882a593Smuzhiyun 	 * MACEISA
75*4882a593Smuzhiyun 	 */
76*4882a593Smuzhiyun 	MACEISA_AUDIO_SW_IRQ,
77*4882a593Smuzhiyun 	MACEISA_AUDIO_SC_IRQ,
78*4882a593Smuzhiyun 	MACEISA_AUDIO1_DMAT_IRQ,
79*4882a593Smuzhiyun 	MACEISA_AUDIO1_OF_IRQ,
80*4882a593Smuzhiyun 	MACEISA_AUDIO2_DMAT_IRQ,
81*4882a593Smuzhiyun 	MACEISA_AUDIO2_MERR_IRQ,
82*4882a593Smuzhiyun 	MACEISA_AUDIO3_DMAT_IRQ,
83*4882a593Smuzhiyun 	MACEISA_AUDIO3_MERR_IRQ,
84*4882a593Smuzhiyun 	MACEISA_RTC_IRQ,
85*4882a593Smuzhiyun 	MACEISA_KEYB_IRQ,
86*4882a593Smuzhiyun 	/* MACEISA_KEYB_POLL is not an IRQ */
87*4882a593Smuzhiyun 	__MACEISA_KEYB_POLL,
88*4882a593Smuzhiyun 	MACEISA_MOUSE_IRQ,
89*4882a593Smuzhiyun 	/* MACEISA_MOUSE_POLL is not an IRQ */
90*4882a593Smuzhiyun 	__MACEISA_MOUSE_POLL,
91*4882a593Smuzhiyun 	MACEISA_TIMER0_IRQ,
92*4882a593Smuzhiyun 	MACEISA_TIMER1_IRQ,
93*4882a593Smuzhiyun 	MACEISA_TIMER2_IRQ,
94*4882a593Smuzhiyun 	MACEISA_PARALLEL_IRQ,
95*4882a593Smuzhiyun 	MACEISA_PAR_CTXA_IRQ,
96*4882a593Smuzhiyun 	MACEISA_PAR_CTXB_IRQ,
97*4882a593Smuzhiyun 	MACEISA_PAR_MERR_IRQ,
98*4882a593Smuzhiyun 	MACEISA_SERIAL1_IRQ,
99*4882a593Smuzhiyun 	MACEISA_SERIAL1_TDMAT_IRQ,
100*4882a593Smuzhiyun 	MACEISA_SERIAL1_TDMAPR_IRQ,
101*4882a593Smuzhiyun 	MACEISA_SERIAL1_TDMAME_IRQ,
102*4882a593Smuzhiyun 	MACEISA_SERIAL1_RDMAT_IRQ,
103*4882a593Smuzhiyun 	MACEISA_SERIAL1_RDMAOR_IRQ,
104*4882a593Smuzhiyun 	MACEISA_SERIAL2_IRQ,
105*4882a593Smuzhiyun 	MACEISA_SERIAL2_TDMAT_IRQ,
106*4882a593Smuzhiyun 	MACEISA_SERIAL2_TDMAPR_IRQ,
107*4882a593Smuzhiyun 	MACEISA_SERIAL2_TDMAME_IRQ,
108*4882a593Smuzhiyun 	MACEISA_SERIAL2_RDMAT_IRQ,
109*4882a593Smuzhiyun 	MACEISA_SERIAL2_RDMAOR_IRQ,
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	IP32_IRQ_MAX			= MACEISA_SERIAL2_RDMAOR_IRQ
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #endif /* __ASM_IP32_INTS_H */
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