1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Format of an instruction in memory. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 5*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 6*4882a593Smuzhiyun * for more details. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 1996, 2000 by Ralf Baechle 9*4882a593Smuzhiyun * Copyright (C) 2006 by Thiemo Seufer 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef _ASM_INST_H 12*4882a593Smuzhiyun #define _ASM_INST_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <uapi/asm/inst.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* HACHACHAHCAHC ... */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* In case some other massaging is needed, keep MIPSInst as wrapper */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define MIPSInst(x) x 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define I_OPCODE_SFT 26 23*4882a593Smuzhiyun #define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define I_JTARGET_SFT 0 26*4882a593Smuzhiyun #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define I_RS_SFT 21 29*4882a593Smuzhiyun #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define I_RT_SFT 16 32*4882a593Smuzhiyun #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define I_IMM_SFT 0 35*4882a593Smuzhiyun #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) 36*4882a593Smuzhiyun #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define I_CACHEOP_SFT 18 39*4882a593Smuzhiyun #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT) 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define I_CACHESEL_SFT 16 42*4882a593Smuzhiyun #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define I_RD_SFT 11 45*4882a593Smuzhiyun #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define I_RE_SFT 6 48*4882a593Smuzhiyun #define MIPSInst_RE(x) ((MIPSInst(x) & 0x000007c0) >> I_RE_SFT) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define I_FUNC_SFT 0 51*4882a593Smuzhiyun #define MIPSInst_FUNC(x) (MIPSInst(x) & 0x0000003f) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define I_FFMT_SFT 21 54*4882a593Smuzhiyun #define MIPSInst_FFMT(x) ((MIPSInst(x) & 0x01e00000) >> I_FFMT_SFT) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define I_FT_SFT 16 57*4882a593Smuzhiyun #define MIPSInst_FT(x) ((MIPSInst(x) & 0x001f0000) >> I_FT_SFT) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define I_FS_SFT 11 60*4882a593Smuzhiyun #define MIPSInst_FS(x) ((MIPSInst(x) & 0x0000f800) >> I_FS_SFT) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define I_FD_SFT 6 63*4882a593Smuzhiyun #define MIPSInst_FD(x) ((MIPSInst(x) & 0x000007c0) >> I_FD_SFT) 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define I_FR_SFT 21 66*4882a593Smuzhiyun #define MIPSInst_FR(x) ((MIPSInst(x) & 0x03e00000) >> I_FR_SFT) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define I_FMA_FUNC_SFT 2 69*4882a593Smuzhiyun #define MIPSInst_FMA_FUNC(x) ((MIPSInst(x) & 0x0000003c) >> I_FMA_FUNC_SFT) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define I_FMA_FFMT_SFT 0 72*4882a593Smuzhiyun #define MIPSInst_FMA_FFMT(x) (MIPSInst(x) & 0x00000003) 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun typedef unsigned int mips_instruction; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* microMIPS instruction decode structure. Do NOT export!!! */ 77*4882a593Smuzhiyun struct mm_decoded_insn { 78*4882a593Smuzhiyun mips_instruction insn; 79*4882a593Smuzhiyun mips_instruction next_insn; 80*4882a593Smuzhiyun int pc_inc; 81*4882a593Smuzhiyun int next_pc_inc; 82*4882a593Smuzhiyun int micro_mips_mode; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* Recode table from 16-bit register notation to 32-bit GPR. Do NOT export!!! */ 86*4882a593Smuzhiyun extern const int reg16to32[]; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #endif /* _ASM_INST_H */ 89