1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_IDLE_H 3*4882a593Smuzhiyun #define __ASM_IDLE_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/cpuidle.h> 6*4882a593Smuzhiyun #include <linux/linkage.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun extern void (*cpu_wait)(void); 9*4882a593Smuzhiyun extern void r4k_wait(void); 10*4882a593Smuzhiyun extern asmlinkage void __r4k_wait(void); 11*4882a593Smuzhiyun extern void r4k_wait_irqoff(void); 12*4882a593Smuzhiyun using_rollback_handler(void)13*4882a593Smuzhiyunstatic inline int using_rollback_handler(void) 14*4882a593Smuzhiyun { 15*4882a593Smuzhiyun return cpu_wait == r4k_wait; 16*4882a593Smuzhiyun } 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun extern void __init check_wait(void); 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun extern int mips_cpuidle_wait_enter(struct cpuidle_device *dev, 21*4882a593Smuzhiyun struct cpuidle_driver *drv, int index); 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MIPS_CPUIDLE_WAIT_STATE {\ 24*4882a593Smuzhiyun .enter = mips_cpuidle_wait_enter,\ 25*4882a593Smuzhiyun .exit_latency = 1,\ 26*4882a593Smuzhiyun .target_residency = 1,\ 27*4882a593Smuzhiyun .power_usage = UINT_MAX,\ 28*4882a593Smuzhiyun .name = "wait",\ 29*4882a593Smuzhiyun .desc = "MIPS wait",\ 30*4882a593Smuzhiyun } 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #endif /* __ASM_IDLE_H */ 33