xref: /OK3568_Linux_fs/kernel/arch/mips/include/asm/fpregdef.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Definitions for the FPU register names
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
5*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
6*4882a593Smuzhiyun  * for more details.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 1995, 1999 Ralf Baechle
9*4882a593Smuzhiyun  * Copyright (C) 1985 MIPS Computer Systems, Inc.
10*4882a593Smuzhiyun  * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun #ifndef _ASM_FPREGDEF_H
13*4882a593Smuzhiyun #define _ASM_FPREGDEF_H
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <asm/sgidefs.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun  * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
19*4882a593Smuzhiyun  * hardfloat and softfloat object files.  The kernel build uses soft-float by
20*4882a593Smuzhiyun  * default, so we also need to pass -msoft-float along to GAS if it supports it.
21*4882a593Smuzhiyun  * But this in turn causes assembler errors in files which access hardfloat
22*4882a593Smuzhiyun  * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
23*4882a593Smuzhiyun  * explicitly put ".set hardfloat" where floating point registers are touched.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun #ifdef GAS_HAS_SET_HARDFLOAT
26*4882a593Smuzhiyun #define SET_HARDFLOAT .set hardfloat
27*4882a593Smuzhiyun #else
28*4882a593Smuzhiyun #define SET_HARDFLOAT
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #if _MIPS_SIM == _MIPS_SIM_ABI32
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun  * These definitions only cover the R3000-ish 16/32 register model.
35*4882a593Smuzhiyun  * But we're trying to be R3000 friendly anyway ...
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun #define fv0	$f0	 /* return value */
38*4882a593Smuzhiyun #define fv0f	$f1
39*4882a593Smuzhiyun #define fv1	$f2
40*4882a593Smuzhiyun #define fv1f	$f3
41*4882a593Smuzhiyun #define fa0	$f12	 /* argument registers */
42*4882a593Smuzhiyun #define fa0f	$f13
43*4882a593Smuzhiyun #define fa1	$f14
44*4882a593Smuzhiyun #define fa1f	$f15
45*4882a593Smuzhiyun #define ft0	$f4	 /* caller saved */
46*4882a593Smuzhiyun #define ft0f	$f5
47*4882a593Smuzhiyun #define ft1	$f6
48*4882a593Smuzhiyun #define ft1f	$f7
49*4882a593Smuzhiyun #define ft2	$f8
50*4882a593Smuzhiyun #define ft2f	$f9
51*4882a593Smuzhiyun #define ft3	$f10
52*4882a593Smuzhiyun #define ft3f	$f11
53*4882a593Smuzhiyun #define ft4	$f16
54*4882a593Smuzhiyun #define ft4f	$f17
55*4882a593Smuzhiyun #define ft5	$f18
56*4882a593Smuzhiyun #define ft5f	$f19
57*4882a593Smuzhiyun #define fs0	$f20	 /* callee saved */
58*4882a593Smuzhiyun #define fs0f	$f21
59*4882a593Smuzhiyun #define fs1	$f22
60*4882a593Smuzhiyun #define fs1f	$f23
61*4882a593Smuzhiyun #define fs2	$f24
62*4882a593Smuzhiyun #define fs2f	$f25
63*4882a593Smuzhiyun #define fs3	$f26
64*4882a593Smuzhiyun #define fs3f	$f27
65*4882a593Smuzhiyun #define fs4	$f28
66*4882a593Smuzhiyun #define fs4f	$f29
67*4882a593Smuzhiyun #define fs5	$f30
68*4882a593Smuzhiyun #define fs5f	$f31
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define fcr31	$31	 /* FPU status register */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define fv0	$f0	/* return value */
77*4882a593Smuzhiyun #define fv1	$f2
78*4882a593Smuzhiyun #define fa0	$f12	/* argument registers */
79*4882a593Smuzhiyun #define fa1	$f13
80*4882a593Smuzhiyun #define fa2	$f14
81*4882a593Smuzhiyun #define fa3	$f15
82*4882a593Smuzhiyun #define fa4	$f16
83*4882a593Smuzhiyun #define fa5	$f17
84*4882a593Smuzhiyun #define fa6	$f18
85*4882a593Smuzhiyun #define fa7	$f19
86*4882a593Smuzhiyun #define ft0	$f4	/* caller saved */
87*4882a593Smuzhiyun #define ft1	$f5
88*4882a593Smuzhiyun #define ft2	$f6
89*4882a593Smuzhiyun #define ft3	$f7
90*4882a593Smuzhiyun #define ft4	$f8
91*4882a593Smuzhiyun #define ft5	$f9
92*4882a593Smuzhiyun #define ft6	$f10
93*4882a593Smuzhiyun #define ft7	$f11
94*4882a593Smuzhiyun #define ft8	$f20
95*4882a593Smuzhiyun #define ft9	$f21
96*4882a593Smuzhiyun #define ft10	$f22
97*4882a593Smuzhiyun #define ft11	$f23
98*4882a593Smuzhiyun #define ft12	$f1
99*4882a593Smuzhiyun #define ft13	$f3
100*4882a593Smuzhiyun #define fs0	$f24	/* callee saved */
101*4882a593Smuzhiyun #define fs1	$f25
102*4882a593Smuzhiyun #define fs2	$f26
103*4882a593Smuzhiyun #define fs3	$f27
104*4882a593Smuzhiyun #define fs4	$f28
105*4882a593Smuzhiyun #define fs5	$f29
106*4882a593Smuzhiyun #define fs6	$f30
107*4882a593Smuzhiyun #define fs7	$f31
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define fcr31	$31
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #endif /* _ASM_FPREGDEF_H */
114