1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/asm-mips/dec/kn02ca.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Personal DECstation 5000/xx (Maxine or KN02-CA) definitions. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2002, 2003 Maciej W. Rozycki 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef __ASM_MIPS_DEC_KN02CA_H 10*4882a593Smuzhiyun #define __ASM_MIPS_DEC_KN02CA_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/dec/kn02xa.h> /* For common definitions. */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* 15*4882a593Smuzhiyun * CPU interrupt bits. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun #define KN02CA_CPU_INR_HALT 6 /* HALT from ACCESS.Bus */ 18*4882a593Smuzhiyun #define KN02CA_CPU_INR_CASCADE 5 /* I/O ASIC cascade */ 19*4882a593Smuzhiyun #define KN02CA_CPU_INR_BUS 4 /* memory, I/O bus read/write errors */ 20*4882a593Smuzhiyun #define KN02CA_CPU_INR_RTC 3 /* DS1287 RTC */ 21*4882a593Smuzhiyun #define KN02CA_CPU_INR_TIMER 2 /* ARC periodic timer */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define KN02CA_IO_INR_FLOPPY 15 /* 82077 FDC */ 27*4882a593Smuzhiyun #define KN02CA_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */ 28*4882a593Smuzhiyun #define KN02CA_IO_INR_POWERON 13 /* (*) ACCESS.Bus/power-on reset */ 29*4882a593Smuzhiyun #define KN02CA_IO_INR_TC0 12 /* TURBOchannel slot #0 */ 30*4882a593Smuzhiyun #define KN02CA_IO_INR_TIMER 12 /* ARC periodic timer (?) */ 31*4882a593Smuzhiyun #define KN02CA_IO_INR_ISDN 11 /* Am79C30A ISDN */ 32*4882a593Smuzhiyun #define KN02CA_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */ 33*4882a593Smuzhiyun #define KN02CA_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */ 34*4882a593Smuzhiyun #define KN02CA_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */ 35*4882a593Smuzhiyun #define KN02CA_IO_INR_HDFLOPPY 7 /* (*) HD (1.44MB) floppy status */ 36*4882a593Smuzhiyun #define KN02CA_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */ 37*4882a593Smuzhiyun #define KN02CA_IO_INR_TC1 5 /* TURBOchannel slot #1 */ 38*4882a593Smuzhiyun #define KN02CA_IO_INR_XDFLOPPY 4 /* (*) XD (2.88MB) floppy status */ 39*4882a593Smuzhiyun #define KN02CA_IO_INR_VIDEO 3 /* framebuffer */ 40*4882a593Smuzhiyun #define KN02CA_IO_INR_XVIDEO 2 /* ~framebuffer */ 41*4882a593Smuzhiyun #define KN02CA_IO_INR_AB_XMIT 1 /* ACCESS.bus transmit */ 42*4882a593Smuzhiyun #define KN02CA_IO_INR_AB_RECV 0 /* ACCESS.bus receive */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* 46*4882a593Smuzhiyun * Memory Error Register bits. 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun #define KN02CA_MER_INTR (1<<27) /* ARC IRQ status & ack */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * Memory Size Register bits. 52*4882a593Smuzhiyun */ 53*4882a593Smuzhiyun #define KN02CA_MSR_INTREN (1<<26) /* ARC periodic IRQ enable */ 54*4882a593Smuzhiyun #define KN02CA_MSR_MS10EN (1<<25) /* 10/1ms IRQ period select */ 55*4882a593Smuzhiyun #define KN02CA_MSR_PFORCE (0xf<<21) /* byte lane error force */ 56*4882a593Smuzhiyun #define KN02CA_MSR_MABEN (1<<20) /* A side VFB address enable */ 57*4882a593Smuzhiyun #define KN02CA_MSR_LASTBANK (0x7<<17) /* onboard RAM bank # */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * I/O ASIC System Support Register bits. 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_14 (1<<14) /* unused */ 63*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_13 (1<<13) /* unused */ 64*4882a593Smuzhiyun #define KN03CA_IO_SSR_ISDN_RST (1<<12) /* ~ISDN (Am79C30A) reset */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define KN03CA_IO_SSR_FLOPPY_RST (1<<7) /* ~FDC (82077) reset */ 67*4882a593Smuzhiyun #define KN03CA_IO_SSR_VIDEO_RST (1<<6) /* ~framebuffer reset */ 68*4882a593Smuzhiyun #define KN03CA_IO_SSR_AB_RST (1<<5) /* ACCESS.bus reset */ 69*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_4 (1<<4) /* unused */ 70*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_3 (1<<4) /* unused */ 71*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_2 (1<<2) /* unused */ 72*4882a593Smuzhiyun #define KN03CA_IO_SSR_RES_1 (1<<1) /* unused */ 73*4882a593Smuzhiyun #define KN03CA_IO_SSR_LED (1<<0) /* power LED */ 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #endif /* __ASM_MIPS_DEC_KN02CA_H */ 76