1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 1996, 99 Ralf Baechle 7*4882a593Smuzhiyun * Copyright (C) 2000, 2002 Maciej W. Rozycki 8*4882a593Smuzhiyun * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef _ASM_ADDRSPACE_H 11*4882a593Smuzhiyun #define _ASM_ADDRSPACE_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <spaces.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * Configure language 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 19*4882a593Smuzhiyun #define _ATYPE_ 20*4882a593Smuzhiyun #define _ATYPE32_ 21*4882a593Smuzhiyun #define _ATYPE64_ 22*4882a593Smuzhiyun #define _CONST64_(x) x 23*4882a593Smuzhiyun #else 24*4882a593Smuzhiyun #define _ATYPE_ __PTRDIFF_TYPE__ 25*4882a593Smuzhiyun #define _ATYPE32_ int 26*4882a593Smuzhiyun #define _ATYPE64_ __s64 27*4882a593Smuzhiyun #ifdef CONFIG_64BIT 28*4882a593Smuzhiyun #define _CONST64_(x) x ## L 29*4882a593Smuzhiyun #else 30*4882a593Smuzhiyun #define _CONST64_(x) x ## LL 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun #endif 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* 35*4882a593Smuzhiyun * 32-bit MIPS address spaces 36*4882a593Smuzhiyun */ 37*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 38*4882a593Smuzhiyun #define _ACAST32_ 39*4882a593Smuzhiyun #define _ACAST64_ 40*4882a593Smuzhiyun #else 41*4882a593Smuzhiyun #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 42*4882a593Smuzhiyun #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 43*4882a593Smuzhiyun #endif 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* 46*4882a593Smuzhiyun * Returns the kernel segment base of a given address 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun #define KSEGX(a) ((_ACAST32_(a)) & _ACAST32_(0xe0000000)) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * Returns the physical address of a CKSEGx / XKPHYS address 52*4882a593Smuzhiyun */ 53*4882a593Smuzhiyun #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) 54*4882a593Smuzhiyun #define XPHYSADDR(a) ((_ACAST64_(a)) & \ 55*4882a593Smuzhiyun _CONST64_(0x0000ffffffffffff)) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #ifdef CONFIG_64BIT 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * Memory segments (64bit kernel mode addresses) 61*4882a593Smuzhiyun * The compatibility segments use the full 64-bit sign extended value. Note 62*4882a593Smuzhiyun * the R8000 doesn't have them so don't reference these in generic MIPS code. 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun #define XKUSEG _CONST64_(0x0000000000000000) 65*4882a593Smuzhiyun #define XKSSEG _CONST64_(0x4000000000000000) 66*4882a593Smuzhiyun #define XKPHYS _CONST64_(0x8000000000000000) 67*4882a593Smuzhiyun #define XKSEG _CONST64_(0xc000000000000000) 68*4882a593Smuzhiyun #define CKSEG0 _CONST64_(0xffffffff80000000) 69*4882a593Smuzhiyun #define CKSEG1 _CONST64_(0xffffffffa0000000) 70*4882a593Smuzhiyun #define CKSSEG _CONST64_(0xffffffffc0000000) 71*4882a593Smuzhiyun #define CKSEG3 _CONST64_(0xffffffffe0000000) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 74*4882a593Smuzhiyun #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 75*4882a593Smuzhiyun #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 76*4882a593Smuzhiyun #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #else 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 81*4882a593Smuzhiyun #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 82*4882a593Smuzhiyun #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 83*4882a593Smuzhiyun #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* 86*4882a593Smuzhiyun * Map an address to a certain kernel segment 87*4882a593Smuzhiyun */ 88*4882a593Smuzhiyun #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 89*4882a593Smuzhiyun #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 90*4882a593Smuzhiyun #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 91*4882a593Smuzhiyun #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* 94*4882a593Smuzhiyun * Memory segments (32bit kernel mode addresses) 95*4882a593Smuzhiyun * These are the traditional names used in the 32-bit universe. 96*4882a593Smuzhiyun */ 97*4882a593Smuzhiyun #define KUSEG 0x00000000 98*4882a593Smuzhiyun #define KSEG0 0x80000000 99*4882a593Smuzhiyun #define KSEG1 0xa0000000 100*4882a593Smuzhiyun #define KSEG2 0xc0000000 101*4882a593Smuzhiyun #define KSEG3 0xe0000000 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define CKUSEG 0x00000000 104*4882a593Smuzhiyun #define CKSEG0 0x80000000 105*4882a593Smuzhiyun #define CKSEG1 0xa0000000 106*4882a593Smuzhiyun #define CKSEG2 0xc0000000 107*4882a593Smuzhiyun #define CKSEG3 0xe0000000 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* 112*4882a593Smuzhiyun * Cache modes for XKPHYS address conversion macros 113*4882a593Smuzhiyun */ 114*4882a593Smuzhiyun #define K_CALG_COH_EXCL1_NOL2 0 115*4882a593Smuzhiyun #define K_CALG_COH_SHRL1_NOL2 1 116*4882a593Smuzhiyun #define K_CALG_UNCACHED 2 117*4882a593Smuzhiyun #define K_CALG_NONCOHERENT 3 118*4882a593Smuzhiyun #define K_CALG_COH_EXCL 4 119*4882a593Smuzhiyun #define K_CALG_COH_SHAREABLE 5 120*4882a593Smuzhiyun #define K_CALG_NOTUSED 6 121*4882a593Smuzhiyun #define K_CALG_UNCACHED_ACCEL 7 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* 124*4882a593Smuzhiyun * 64-bit address conversions 125*4882a593Smuzhiyun */ 126*4882a593Smuzhiyun #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) 127*4882a593Smuzhiyun #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) 128*4882a593Smuzhiyun #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 129*4882a593Smuzhiyun #define PHYS_TO_XKPHYS(cm, a) (XKPHYS | (_ACAST64_(cm) << 59) | (a)) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun /* 132*4882a593Smuzhiyun * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting 133*4882a593Smuzhiyun * the region, 3 bits for the CCA mode. This leaves 59 bits of which the 134*4882a593Smuzhiyun * R8000 implements most with its 48-bit physical address space. 135*4882a593Smuzhiyun */ 136*4882a593Smuzhiyun #define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) /* 2^^59 - 1 */ 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) 139*4882a593Smuzhiyun #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) 142*4882a593Smuzhiyun #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #endif /* _ASM_ADDRSPACE_H */ 145