1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 1996 David S. Miller (dm@sgi.com)
7*4882a593Smuzhiyun * Compatibility with board caches, Ulf Carlsson
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <asm/sgialib.h>
11*4882a593Smuzhiyun #include <asm/bcache.h>
12*4882a593Smuzhiyun #include <asm/setup.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #if defined(CONFIG_64BIT) && defined(CONFIG_FW_ARC32)
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * For 64bit kernels working with a 32bit ARC PROM pointer arguments
17*4882a593Smuzhiyun * for ARC calls need to reside in CKEG0/1. But as soon as the kernel
18*4882a593Smuzhiyun * switches to it's first kernel thread stack is set to an address in
19*4882a593Smuzhiyun * XKPHYS, so anything on stack can't be used anymore. This is solved
20*4882a593Smuzhiyun * by using a * static declartion variables are put into BSS, which is
21*4882a593Smuzhiyun * linked to a CKSEG0 address. Since this is only used on UP platforms
22*4882a593Smuzhiyun * there is not spinlock needed
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun #define O32_STATIC static
25*4882a593Smuzhiyun #else
26*4882a593Smuzhiyun #define O32_STATIC
27*4882a593Smuzhiyun #endif
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun * IP22 boardcache is not compatible with board caches. Thus we disable it
31*4882a593Smuzhiyun * during romvec action. Since r4xx0.c is always compiled and linked with your
32*4882a593Smuzhiyun * kernel, this shouldn't cause any harm regardless what MIPS processor you
33*4882a593Smuzhiyun * have.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * The ARC write and read functions seem to interfere with the serial lines
36*4882a593Smuzhiyun * in some way. You should be careful with them.
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun
prom_putchar(char c)39*4882a593Smuzhiyun void prom_putchar(char c)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun O32_STATIC ULONG cnt;
42*4882a593Smuzhiyun O32_STATIC CHAR it;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun it = c;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun bc_disable();
47*4882a593Smuzhiyun ArcWrite(1, &it, 1, &cnt);
48*4882a593Smuzhiyun bc_enable();
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
prom_getchar(void)51*4882a593Smuzhiyun char prom_getchar(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun O32_STATIC ULONG cnt;
54*4882a593Smuzhiyun O32_STATIC CHAR c;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun bc_disable();
57*4882a593Smuzhiyun ArcRead(0, &c, 1, &cnt);
58*4882a593Smuzhiyun bc_enable();
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return c;
61*4882a593Smuzhiyun }
62