xref: /OK3568_Linux_fs/kernel/arch/mips/dec/time.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
4*4882a593Smuzhiyun  *  Copyright (C) 2000, 2003  Maciej W. Rozycki
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file contains the time handling details for PC-style clocks as
7*4882a593Smuzhiyun  * found in some MIPS systems.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/bcd.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/mc146818rtc.h>
13*4882a593Smuzhiyun #include <linux/param.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <asm/cpu-features.h>
16*4882a593Smuzhiyun #include <asm/ds1287.h>
17*4882a593Smuzhiyun #include <asm/time.h>
18*4882a593Smuzhiyun #include <asm/dec/interrupts.h>
19*4882a593Smuzhiyun #include <asm/dec/ioasic.h>
20*4882a593Smuzhiyun #include <asm/dec/machtype.h>
21*4882a593Smuzhiyun 
read_persistent_clock64(struct timespec64 * ts)22*4882a593Smuzhiyun void read_persistent_clock64(struct timespec64 *ts)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	unsigned int year, mon, day, hour, min, sec, real_year;
25*4882a593Smuzhiyun 	unsigned long flags;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	spin_lock_irqsave(&rtc_lock, flags);
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	do {
30*4882a593Smuzhiyun 		sec = CMOS_READ(RTC_SECONDS);
31*4882a593Smuzhiyun 		min = CMOS_READ(RTC_MINUTES);
32*4882a593Smuzhiyun 		hour = CMOS_READ(RTC_HOURS);
33*4882a593Smuzhiyun 		day = CMOS_READ(RTC_DAY_OF_MONTH);
34*4882a593Smuzhiyun 		mon = CMOS_READ(RTC_MONTH);
35*4882a593Smuzhiyun 		year = CMOS_READ(RTC_YEAR);
36*4882a593Smuzhiyun 		/*
37*4882a593Smuzhiyun 		 * The PROM will reset the year to either '72 or '73.
38*4882a593Smuzhiyun 		 * Therefore we store the real year separately, in one
39*4882a593Smuzhiyun 		 * of unused BBU RAM locations.
40*4882a593Smuzhiyun 		 */
41*4882a593Smuzhiyun 		real_year = CMOS_READ(RTC_DEC_YEAR);
42*4882a593Smuzhiyun 	} while (sec != CMOS_READ(RTC_SECONDS));
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rtc_lock, flags);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
47*4882a593Smuzhiyun 		sec = bcd2bin(sec);
48*4882a593Smuzhiyun 		min = bcd2bin(min);
49*4882a593Smuzhiyun 		hour = bcd2bin(hour);
50*4882a593Smuzhiyun 		day = bcd2bin(day);
51*4882a593Smuzhiyun 		mon = bcd2bin(mon);
52*4882a593Smuzhiyun 		year = bcd2bin(year);
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	year += real_year - 72 + 2000;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	ts->tv_sec = mktime64(year, mon, day, hour, min, sec);
58*4882a593Smuzhiyun 	ts->tv_nsec = 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /*
62*4882a593Smuzhiyun  * In order to set the CMOS clock precisely, update_persistent_clock64 has to
63*4882a593Smuzhiyun  * be called 500 ms after the second nowtime has started, because when
64*4882a593Smuzhiyun  * nowtime is written into the registers of the CMOS clock, it will
65*4882a593Smuzhiyun  * jump to the next second precisely 500 ms later.  Check the Dallas
66*4882a593Smuzhiyun  * DS1287 data sheet for details.
67*4882a593Smuzhiyun  */
update_persistent_clock64(struct timespec64 now)68*4882a593Smuzhiyun int update_persistent_clock64(struct timespec64 now)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	time64_t nowtime = now.tv_sec;
71*4882a593Smuzhiyun 	int retval = 0;
72*4882a593Smuzhiyun 	int real_seconds, real_minutes, cmos_minutes;
73*4882a593Smuzhiyun 	unsigned char save_control, save_freq_select;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* irq are locally disabled here */
76*4882a593Smuzhiyun 	spin_lock(&rtc_lock);
77*4882a593Smuzhiyun 	/* tell the clock it's being set */
78*4882a593Smuzhiyun 	save_control = CMOS_READ(RTC_CONTROL);
79*4882a593Smuzhiyun 	CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	/* stop and reset prescaler */
82*4882a593Smuzhiyun 	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
83*4882a593Smuzhiyun 	CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	cmos_minutes = CMOS_READ(RTC_MINUTES);
86*4882a593Smuzhiyun 	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
87*4882a593Smuzhiyun 		cmos_minutes = bcd2bin(cmos_minutes);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/*
90*4882a593Smuzhiyun 	 * since we're only adjusting minutes and seconds,
91*4882a593Smuzhiyun 	 * don't interfere with hour overflow. This avoids
92*4882a593Smuzhiyun 	 * messing with unknown time zones but requires your
93*4882a593Smuzhiyun 	 * RTC not to be off by more than 15 minutes
94*4882a593Smuzhiyun 	 */
95*4882a593Smuzhiyun 	real_minutes = div_s64_rem(nowtime, 60, &real_seconds);
96*4882a593Smuzhiyun 	if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
97*4882a593Smuzhiyun 		real_minutes += 30;	/* correct for half hour time zone */
98*4882a593Smuzhiyun 	real_minutes %= 60;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	if (abs(real_minutes - cmos_minutes) < 30) {
101*4882a593Smuzhiyun 		if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
102*4882a593Smuzhiyun 			real_seconds = bin2bcd(real_seconds);
103*4882a593Smuzhiyun 			real_minutes = bin2bcd(real_minutes);
104*4882a593Smuzhiyun 		}
105*4882a593Smuzhiyun 		CMOS_WRITE(real_seconds, RTC_SECONDS);
106*4882a593Smuzhiyun 		CMOS_WRITE(real_minutes, RTC_MINUTES);
107*4882a593Smuzhiyun 	} else {
108*4882a593Smuzhiyun 		printk_once(KERN_NOTICE
109*4882a593Smuzhiyun 		       "set_rtc_mmss: can't update from %d to %d\n",
110*4882a593Smuzhiyun 		       cmos_minutes, real_minutes);
111*4882a593Smuzhiyun 		retval = -1;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	/* The following flags have to be released exactly in this order,
115*4882a593Smuzhiyun 	 * otherwise the DS1287 will not reset the oscillator and will not
116*4882a593Smuzhiyun 	 * update precisely 500 ms later.  You won't find this mentioned
117*4882a593Smuzhiyun 	 * in the Dallas Semiconductor data sheets, but who believes data
118*4882a593Smuzhiyun 	 * sheets anyway ...                           -- Markus Kuhn
119*4882a593Smuzhiyun 	 */
120*4882a593Smuzhiyun 	CMOS_WRITE(save_control, RTC_CONTROL);
121*4882a593Smuzhiyun 	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
122*4882a593Smuzhiyun 	spin_unlock(&rtc_lock);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	return retval;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
plat_time_init(void)127*4882a593Smuzhiyun void __init plat_time_init(void)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	int ioasic_clock = 0;
130*4882a593Smuzhiyun 	u32 start, end;
131*4882a593Smuzhiyun 	int i = HZ / 8;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	/* Set up the rate of periodic DS1287 interrupts. */
134*4882a593Smuzhiyun 	ds1287_set_base_clock(HZ);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	/* On some I/O ASIC systems we have the I/O ASIC's counter.  */
137*4882a593Smuzhiyun 	if (IOASIC)
138*4882a593Smuzhiyun 		ioasic_clock = dec_ioasic_clocksource_init() == 0;
139*4882a593Smuzhiyun 	if (cpu_has_counter) {
140*4882a593Smuzhiyun 		ds1287_timer_state();
141*4882a593Smuzhiyun 		while (!ds1287_timer_state())
142*4882a593Smuzhiyun 			;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 		start = read_c0_count();
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 		while (i--)
147*4882a593Smuzhiyun 			while (!ds1287_timer_state())
148*4882a593Smuzhiyun 				;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 		end = read_c0_count();
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 		mips_hpt_frequency = (end - start) * 8;
153*4882a593Smuzhiyun 		printk(KERN_INFO "MIPS counter frequency %dHz\n",
154*4882a593Smuzhiyun 			mips_hpt_frequency);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 		/*
157*4882a593Smuzhiyun 		 * All R4k DECstations suffer from the CP0 Count erratum,
158*4882a593Smuzhiyun 		 * so we can't use the timer as a clock source, and a clock
159*4882a593Smuzhiyun 		 * event both at a time.  An accurate wall clock is more
160*4882a593Smuzhiyun 		 * important than a high-precision interval timer so only
161*4882a593Smuzhiyun 		 * use the timer as a clock source, and not a clock event
162*4882a593Smuzhiyun 		 * if there's no I/O ASIC counter available to serve as a
163*4882a593Smuzhiyun 		 * clock source.
164*4882a593Smuzhiyun 		 */
165*4882a593Smuzhiyun 		if (!ioasic_clock) {
166*4882a593Smuzhiyun 			init_r4k_clocksource();
167*4882a593Smuzhiyun 			mips_hpt_frequency = 0;
168*4882a593Smuzhiyun 		}
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);
172*4882a593Smuzhiyun }
173