xref: /OK3568_Linux_fs/kernel/arch/mips/cobalt/irq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * IRQ vector handles
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
5*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
6*4882a593Smuzhiyun  * for more details.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/irq.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/i8259.h>
17*4882a593Smuzhiyun #include <asm/irq_cpu.h>
18*4882a593Smuzhiyun #include <asm/irq_gt641xx.h>
19*4882a593Smuzhiyun #include <asm/gt64120.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <irq.h>
22*4882a593Smuzhiyun 
plat_irq_dispatch(void)23*4882a593Smuzhiyun asmlinkage void plat_irq_dispatch(void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	unsigned pending = read_c0_status() & read_c0_cause() & ST0_IM;
26*4882a593Smuzhiyun 	int irq;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	if (pending & CAUSEF_IP2)
29*4882a593Smuzhiyun 		gt641xx_irq_dispatch();
30*4882a593Smuzhiyun 	else if (pending & CAUSEF_IP6) {
31*4882a593Smuzhiyun 		irq = i8259_irq();
32*4882a593Smuzhiyun 		if (irq < 0)
33*4882a593Smuzhiyun 			spurious_interrupt();
34*4882a593Smuzhiyun 		else
35*4882a593Smuzhiyun 			do_IRQ(irq);
36*4882a593Smuzhiyun 	} else if (pending & CAUSEF_IP3)
37*4882a593Smuzhiyun 		do_IRQ(MIPS_CPU_IRQ_BASE + 3);
38*4882a593Smuzhiyun 	else if (pending & CAUSEF_IP4)
39*4882a593Smuzhiyun 		do_IRQ(MIPS_CPU_IRQ_BASE + 4);
40*4882a593Smuzhiyun 	else if (pending & CAUSEF_IP5)
41*4882a593Smuzhiyun 		do_IRQ(MIPS_CPU_IRQ_BASE + 5);
42*4882a593Smuzhiyun 	else if (pending & CAUSEF_IP7)
43*4882a593Smuzhiyun 		do_IRQ(MIPS_CPU_IRQ_BASE + 7);
44*4882a593Smuzhiyun 	else
45*4882a593Smuzhiyun 		spurious_interrupt();
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
arch_init_irq(void)48*4882a593Smuzhiyun void __init arch_init_irq(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	mips_cpu_irq_init();
51*4882a593Smuzhiyun 	gt641xx_irq_init();
52*4882a593Smuzhiyun 	init_i8259_irqs();
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	if (request_irq(GT641XX_CASCADE_IRQ, no_action, IRQF_NO_THREAD,
55*4882a593Smuzhiyun 			"cascade", NULL)) {
56*4882a593Smuzhiyun 		pr_err("Failed to request irq %d (cascade)\n",
57*4882a593Smuzhiyun 		       GT641XX_CASCADE_IRQ);
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 	if (request_irq(I8259_CASCADE_IRQ, no_action, IRQF_NO_THREAD,
60*4882a593Smuzhiyun 			"cascade", NULL)) {
61*4882a593Smuzhiyun 		pr_err("Failed to request irq %d (cascade)\n",
62*4882a593Smuzhiyun 		       I8259_CASCADE_IRQ);
63*4882a593Smuzhiyun 	}
64*4882a593Smuzhiyun }
65