1*4882a593Smuzhiyun /***********************license start***************
2*4882a593Smuzhiyun * Author: Cavium Networks
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Contact: support@caviumnetworks.com
5*4882a593Smuzhiyun * This file is part of the OCTEON SDK
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003-2008 Cavium Networks
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun * published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more
17*4882a593Smuzhiyun * details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun * along with this file; if not, write to the Free Software
21*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*4882a593Smuzhiyun * or visit http://www.gnu.org/licenses/.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * This file may also be available under a different license from Cavium.
25*4882a593Smuzhiyun * Contact Cavium Networks for more information
26*4882a593Smuzhiyun ***********************license end**************************************/
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * Functions for NPI initialization, configuration,
30*4882a593Smuzhiyun * and monitoring.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun #include <asm/octeon/octeon.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <asm/octeon/cvmx-config.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #include <asm/octeon/cvmx-helper.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #include <asm/octeon/cvmx-pip-defs.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /**
41*4882a593Smuzhiyun * Probe a NPI interface and determine the number of ports
42*4882a593Smuzhiyun * connected to it. The NPI interface should still be down
43*4882a593Smuzhiyun * after this call.
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * @interface: Interface to probe
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun * Returns Number of ports on the interface. Zero to disable.
48*4882a593Smuzhiyun */
__cvmx_helper_npi_probe(int interface)49*4882a593Smuzhiyun int __cvmx_helper_npi_probe(int interface)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun #if CVMX_PKO_QUEUES_PER_PORT_PCI > 0
52*4882a593Smuzhiyun if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))
53*4882a593Smuzhiyun return 4;
54*4882a593Smuzhiyun else if (OCTEON_IS_MODEL(OCTEON_CN56XX)
55*4882a593Smuzhiyun && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X))
56*4882a593Smuzhiyun /* The packet engines didn't exist before pass 2 */
57*4882a593Smuzhiyun return 4;
58*4882a593Smuzhiyun else if (OCTEON_IS_MODEL(OCTEON_CN52XX)
59*4882a593Smuzhiyun && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X))
60*4882a593Smuzhiyun /* The packet engines didn't exist before pass 2 */
61*4882a593Smuzhiyun return 4;
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /**
67*4882a593Smuzhiyun * Bringup and enable a NPI interface. After this call packet
68*4882a593Smuzhiyun * I/O should be fully functional. This is called with IPD
69*4882a593Smuzhiyun * enabled but PKO disabled.
70*4882a593Smuzhiyun *
71*4882a593Smuzhiyun * @interface: Interface to bring up
72*4882a593Smuzhiyun *
73*4882a593Smuzhiyun * Returns Zero on success, negative on failure
74*4882a593Smuzhiyun */
__cvmx_helper_npi_enable(int interface)75*4882a593Smuzhiyun int __cvmx_helper_npi_enable(int interface)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * On CN50XX, CN52XX, and CN56XX we need to disable length
79*4882a593Smuzhiyun * checking so packet < 64 bytes and jumbo frames don't get
80*4882a593Smuzhiyun * errors.
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) &&
83*4882a593Smuzhiyun !OCTEON_IS_MODEL(OCTEON_CN58XX)) {
84*4882a593Smuzhiyun int num_ports = cvmx_helper_ports_on_interface(interface);
85*4882a593Smuzhiyun int port;
86*4882a593Smuzhiyun for (port = 0; port < num_ports; port++) {
87*4882a593Smuzhiyun union cvmx_pip_prt_cfgx port_cfg;
88*4882a593Smuzhiyun int ipd_port =
89*4882a593Smuzhiyun cvmx_helper_get_ipd_port(interface, port);
90*4882a593Smuzhiyun port_cfg.u64 =
91*4882a593Smuzhiyun cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
92*4882a593Smuzhiyun port_cfg.s.maxerr_en = 0;
93*4882a593Smuzhiyun port_cfg.s.minerr_en = 0;
94*4882a593Smuzhiyun cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port),
95*4882a593Smuzhiyun port_cfg.u64);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Enables are controlled by the remote host, so nothing to do here */
100*4882a593Smuzhiyun return 0;
101*4882a593Smuzhiyun }
102