xref: /OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/crypto/octeon-crypto.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun  * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun  * for more details.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2012-2013 Cavium Inc., All Rights Reserved.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * MD5/SHA1/SHA256/SHA512 instruction definitions added by
9*4882a593Smuzhiyun  * Aaro Koskinen <aaro.koskinen@iki.fi>.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun #ifndef __LINUX_OCTEON_CRYPTO_H
13*4882a593Smuzhiyun #define __LINUX_OCTEON_CRYPTO_H
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/sched.h>
16*4882a593Smuzhiyun #include <asm/mipsregs.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define OCTEON_CR_OPCODE_PRIORITY 300
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state);
21*4882a593Smuzhiyun extern void octeon_crypto_disable(struct octeon_cop2_state *state,
22*4882a593Smuzhiyun 				  unsigned long flags);
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun  * Macros needed to implement MD5/SHA1/SHA256:
26*4882a593Smuzhiyun  */
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun  * The index can be 0-1 (MD5) or 0-2 (SHA1), 0-3 (SHA256).
30*4882a593Smuzhiyun  */
31*4882a593Smuzhiyun #define write_octeon_64bit_hash_dword(value, index)	\
32*4882a593Smuzhiyun do {							\
33*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
34*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0048+" STR(index)		\
35*4882a593Smuzhiyun 	:						\
36*4882a593Smuzhiyun 	: [rt] "d" (cpu_to_be64(value)));		\
37*4882a593Smuzhiyun } while (0)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun  * The index can be 0-1 (MD5) or 0-2 (SHA1), 0-3 (SHA256).
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun #define read_octeon_64bit_hash_dword(index)		\
43*4882a593Smuzhiyun ({							\
44*4882a593Smuzhiyun 	u64 __value;					\
45*4882a593Smuzhiyun 							\
46*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
47*4882a593Smuzhiyun 	"dmfc2 %[rt],0x0048+" STR(index)		\
48*4882a593Smuzhiyun 	: [rt] "=d" (__value)				\
49*4882a593Smuzhiyun 	: );						\
50*4882a593Smuzhiyun 							\
51*4882a593Smuzhiyun 	be64_to_cpu(__value);				\
52*4882a593Smuzhiyun })
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /*
55*4882a593Smuzhiyun  * The index can be 0-6.
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun #define write_octeon_64bit_block_dword(value, index)	\
58*4882a593Smuzhiyun do {							\
59*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
60*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0040+" STR(index)		\
61*4882a593Smuzhiyun 	:						\
62*4882a593Smuzhiyun 	: [rt] "d" (cpu_to_be64(value)));		\
63*4882a593Smuzhiyun } while (0)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /*
66*4882a593Smuzhiyun  * The value is the final block dword (64-bit).
67*4882a593Smuzhiyun  */
68*4882a593Smuzhiyun #define octeon_md5_start(value)				\
69*4882a593Smuzhiyun do {							\
70*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
71*4882a593Smuzhiyun 	"dmtc2 %[rt],0x4047"				\
72*4882a593Smuzhiyun 	:						\
73*4882a593Smuzhiyun 	: [rt] "d" (cpu_to_be64(value)));		\
74*4882a593Smuzhiyun } while (0)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * The value is the final block dword (64-bit).
78*4882a593Smuzhiyun  */
79*4882a593Smuzhiyun #define octeon_sha1_start(value)			\
80*4882a593Smuzhiyun do {							\
81*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
82*4882a593Smuzhiyun 	"dmtc2 %[rt],0x4057"				\
83*4882a593Smuzhiyun 	:						\
84*4882a593Smuzhiyun 	: [rt] "d" (value));				\
85*4882a593Smuzhiyun } while (0)
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun  * The value is the final block dword (64-bit).
89*4882a593Smuzhiyun  */
90*4882a593Smuzhiyun #define octeon_sha256_start(value)			\
91*4882a593Smuzhiyun do {							\
92*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
93*4882a593Smuzhiyun 	"dmtc2 %[rt],0x404f"				\
94*4882a593Smuzhiyun 	:						\
95*4882a593Smuzhiyun 	: [rt] "d" (value));				\
96*4882a593Smuzhiyun } while (0)
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /*
99*4882a593Smuzhiyun  * Macros needed to implement SHA512:
100*4882a593Smuzhiyun  */
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun /*
103*4882a593Smuzhiyun  * The index can be 0-7.
104*4882a593Smuzhiyun  */
105*4882a593Smuzhiyun #define write_octeon_64bit_hash_sha512(value, index)	\
106*4882a593Smuzhiyun do {							\
107*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
108*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0250+" STR(index)		\
109*4882a593Smuzhiyun 	:						\
110*4882a593Smuzhiyun 	: [rt] "d" (value));				\
111*4882a593Smuzhiyun } while (0)
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun  * The index can be 0-7.
115*4882a593Smuzhiyun  */
116*4882a593Smuzhiyun #define read_octeon_64bit_hash_sha512(index)		\
117*4882a593Smuzhiyun ({							\
118*4882a593Smuzhiyun 	u64 __value;					\
119*4882a593Smuzhiyun 							\
120*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
121*4882a593Smuzhiyun 	"dmfc2 %[rt],0x0250+" STR(index)		\
122*4882a593Smuzhiyun 	: [rt] "=d" (__value)				\
123*4882a593Smuzhiyun 	: );						\
124*4882a593Smuzhiyun 							\
125*4882a593Smuzhiyun 	__value;					\
126*4882a593Smuzhiyun })
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun /*
129*4882a593Smuzhiyun  * The index can be 0-14.
130*4882a593Smuzhiyun  */
131*4882a593Smuzhiyun #define write_octeon_64bit_block_sha512(value, index)	\
132*4882a593Smuzhiyun do {							\
133*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
134*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0240+" STR(index)		\
135*4882a593Smuzhiyun 	:						\
136*4882a593Smuzhiyun 	: [rt] "d" (value));				\
137*4882a593Smuzhiyun } while (0)
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun  * The value is the final block word (64-bit).
141*4882a593Smuzhiyun  */
142*4882a593Smuzhiyun #define octeon_sha512_start(value)			\
143*4882a593Smuzhiyun do {							\
144*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
145*4882a593Smuzhiyun 	"dmtc2 %[rt],0x424f"				\
146*4882a593Smuzhiyun 	:						\
147*4882a593Smuzhiyun 	: [rt] "d" (value));				\
148*4882a593Smuzhiyun } while (0)
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun /*
151*4882a593Smuzhiyun  * The value is the final block dword (64-bit).
152*4882a593Smuzhiyun  */
153*4882a593Smuzhiyun #define octeon_sha1_start(value)			\
154*4882a593Smuzhiyun do {							\
155*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
156*4882a593Smuzhiyun 	"dmtc2 %[rt],0x4057"				\
157*4882a593Smuzhiyun 	:						\
158*4882a593Smuzhiyun 	: [rt] "d" (value));				\
159*4882a593Smuzhiyun } while (0)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun  * The value is the final block dword (64-bit).
163*4882a593Smuzhiyun  */
164*4882a593Smuzhiyun #define octeon_sha256_start(value)			\
165*4882a593Smuzhiyun do {							\
166*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
167*4882a593Smuzhiyun 	"dmtc2 %[rt],0x404f"				\
168*4882a593Smuzhiyun 	:						\
169*4882a593Smuzhiyun 	: [rt] "d" (value));				\
170*4882a593Smuzhiyun } while (0)
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /*
173*4882a593Smuzhiyun  * Macros needed to implement SHA512:
174*4882a593Smuzhiyun  */
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun /*
177*4882a593Smuzhiyun  * The index can be 0-7.
178*4882a593Smuzhiyun  */
179*4882a593Smuzhiyun #define write_octeon_64bit_hash_sha512(value, index)	\
180*4882a593Smuzhiyun do {							\
181*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
182*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0250+" STR(index)		\
183*4882a593Smuzhiyun 	:						\
184*4882a593Smuzhiyun 	: [rt] "d" (value));				\
185*4882a593Smuzhiyun } while (0)
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /*
188*4882a593Smuzhiyun  * The index can be 0-7.
189*4882a593Smuzhiyun  */
190*4882a593Smuzhiyun #define read_octeon_64bit_hash_sha512(index)		\
191*4882a593Smuzhiyun ({							\
192*4882a593Smuzhiyun 	u64 __value;					\
193*4882a593Smuzhiyun 							\
194*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
195*4882a593Smuzhiyun 	"dmfc2 %[rt],0x0250+" STR(index)		\
196*4882a593Smuzhiyun 	: [rt] "=d" (__value)				\
197*4882a593Smuzhiyun 	: );						\
198*4882a593Smuzhiyun 							\
199*4882a593Smuzhiyun 	__value;					\
200*4882a593Smuzhiyun })
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun /*
203*4882a593Smuzhiyun  * The index can be 0-14.
204*4882a593Smuzhiyun  */
205*4882a593Smuzhiyun #define write_octeon_64bit_block_sha512(value, index)	\
206*4882a593Smuzhiyun do {							\
207*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
208*4882a593Smuzhiyun 	"dmtc2 %[rt],0x0240+" STR(index)		\
209*4882a593Smuzhiyun 	:						\
210*4882a593Smuzhiyun 	: [rt] "d" (value));				\
211*4882a593Smuzhiyun } while (0)
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun  * The value is the final block word (64-bit).
215*4882a593Smuzhiyun  */
216*4882a593Smuzhiyun #define octeon_sha512_start(value)			\
217*4882a593Smuzhiyun do {							\
218*4882a593Smuzhiyun 	__asm__ __volatile__ (				\
219*4882a593Smuzhiyun 	"dmtc2 %[rt],0x424f"				\
220*4882a593Smuzhiyun 	:						\
221*4882a593Smuzhiyun 	: [rt] "d" (value));				\
222*4882a593Smuzhiyun } while (0)
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun #endif /* __LINUX_OCTEON_CRYPTO_H */
225