1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 5*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "ar9331.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Onion Omega"; 11*4882a593Smuzhiyun compatible = "onion,omega"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun serial0 = &uart; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun memory@0 { 18*4882a593Smuzhiyun device_type = "memory"; 19*4882a593Smuzhiyun reg = <0x0 0x4000000>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun leds { 23*4882a593Smuzhiyun compatible = "gpio-leds"; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun system { 26*4882a593Smuzhiyun label = "onion:amber:system"; 27*4882a593Smuzhiyun gpios = <&gpio 27 GPIO_ACTIVE_LOW>; 28*4882a593Smuzhiyun default-state = "off"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun gpio-keys { 33*4882a593Smuzhiyun compatible = "gpio-keys"; 34*4882a593Smuzhiyun #address-cells = <1>; 35*4882a593Smuzhiyun #size-cells = <0>; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun button@0 { 38*4882a593Smuzhiyun label = "reset"; 39*4882a593Smuzhiyun linux,code = <KEY_RESTART>; 40*4882a593Smuzhiyun gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun&ref { 46*4882a593Smuzhiyun clock-frequency = <25000000>; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun&uart { 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&gpio { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&usb { 58*4882a593Smuzhiyun dr_mode = "host"; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&usb_phy { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun&spi { 67*4882a593Smuzhiyun num-chipselects = <1>; 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* Winbond 25Q128FVSG SPI flash */ 71*4882a593Smuzhiyun spiflash: w25q128@0 { 72*4882a593Smuzhiyun #address-cells = <1>; 73*4882a593Smuzhiyun #size-cells = <1>; 74*4882a593Smuzhiyun compatible = "winbond,w25q128", "jedec,spi-nor"; 75*4882a593Smuzhiyun spi-max-frequency = <104000000>; 76*4882a593Smuzhiyun reg = <0>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79