1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/ { 6*4882a593Smuzhiyun #address-cells = <2>; 7*4882a593Smuzhiyun #size-cells = <2>; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun cpuintc: interrupt-controller { 10*4882a593Smuzhiyun #address-cells = <0>; 11*4882a593Smuzhiyun #interrupt-cells = <1>; 12*4882a593Smuzhiyun interrupt-controller; 13*4882a593Smuzhiyun compatible = "mti,cpu-interrupt-controller"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun package0: bus@1fe00000 { 17*4882a593Smuzhiyun compatible = "simple-bus"; 18*4882a593Smuzhiyun #address-cells = <2>; 19*4882a593Smuzhiyun #size-cells = <1>; 20*4882a593Smuzhiyun ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 21*4882a593Smuzhiyun 0 0x3ff00000 0 0x3ff00000 0x100000 22*4882a593Smuzhiyun /* 3A HT Config Space */ 23*4882a593Smuzhiyun 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000 24*4882a593Smuzhiyun /* 3B HT Config Space */ 25*4882a593Smuzhiyun 0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun liointc: interrupt-controller@3ff01400 { 28*4882a593Smuzhiyun compatible = "loongson,liointc-1.0"; 29*4882a593Smuzhiyun reg = <0 0x3ff01400 0x64>; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupt-controller; 32*4882a593Smuzhiyun #interrupt-cells = <2>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun interrupt-parent = <&cpuintc>; 35*4882a593Smuzhiyun interrupts = <2>, <3>; 36*4882a593Smuzhiyun interrupt-names = "int0", "int1"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun loongson,parent_int_map = <0xf0ffffff>, /* int0 */ 39*4882a593Smuzhiyun <0x0f000000>, /* int1 */ 40*4882a593Smuzhiyun <0x00000000>, /* int2 */ 41*4882a593Smuzhiyun <0x00000000>; /* int3 */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun cpu_uart0: serial@1fe001e0 { 46*4882a593Smuzhiyun compatible = "ns16550a"; 47*4882a593Smuzhiyun reg = <0 0x1fe001e0 0x8>; 48*4882a593Smuzhiyun clock-frequency = <33000000>; 49*4882a593Smuzhiyun interrupt-parent = <&liointc>; 50*4882a593Smuzhiyun interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 51*4882a593Smuzhiyun no-loopback-test; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun cpu_uart1: serial@1fe001e8 { 55*4882a593Smuzhiyun status = "disabled"; 56*4882a593Smuzhiyun compatible = "ns16550a"; 57*4882a593Smuzhiyun reg = <0 0x1fe001e8 0x8>; 58*4882a593Smuzhiyun clock-frequency = <33000000>; 59*4882a593Smuzhiyun interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 60*4882a593Smuzhiyun interrupt-parent = <&liointc>; 61*4882a593Smuzhiyun no-loopback-test; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun}; 65